Abstract: A location to insert stack clearing code into a method to be executed in an execution environment of a computer system is determined. The stack clearing code is inserted into the location of the method. The stack clearing code is executed during execution of the method to clear a stack. Other embodiments are also described and claimed.

Abstract: A virtual machine in a processing system manages type information for operands. In one embodiment, the virtual machine accomplishes the following results through execution of a single instruction: adding an operand tag to a tag stack, and updating a stack pointer for the tag stack to recognize the addition of the operand tag to the tag stack. The single instruction may be a shift instruction, for example. The tag stack may reside in a tag stack register, and each operand tag may indicate whether a corresponding operand on an operand stack is to be treated as a reference operand or a non-reference operand. Other embodiments are described and claimed.

Abstract: Systems and methods perform affine partitioning on a code stream to produce code segments that may be parallelized. The code segments include copies of the original code stream with conditional inserted that aid in parallelizing code. The conditional is formed by determining the constraints on a processor variable determined by the affine partitioning and applying the constraints to the original code stream.

Abstract: Apparatus and methods for performing generational escape analysis in managed runtime environments are disclosed. The disclosed apparatus and methods determine the generational age of an equivalence class while performing escape analysis. Equivalence classes having generational ages are cloned if their generational ages are less than a threshold age.

Abstract: A method for statement shifting to increase the parallelism of loops includes constructing a data dependence graph (DDG) to represent dependences between statements in a loop, constructing a basic equations group from the DDG, constructing a dependence equations group derived in part from the basic equations group, and determining a shifting vector for the loop from the dependence equations group, wherein the shifting vector to represent an offset to apply to each statement in the loop for statement shifting. Other embodiments are also disclosed.

Abstract: Code is affine partitioned to generate affine partitioning mappings. Parallel code is generated based on the affine partitioning mappings. Generating the parallel code includes coalescing loops in the parallel code generated from the affine partitioning mappings to generate coalesced parallel code and optimizing the coalesced parallel code.

Abstract: Linear transformations of statements in code are performed to generate linear expressions associated with the statements. Parallel code is generated using the linear expressions. Generating the parallel code includes splitting the computation-space of the statements into intervals and generating parallel code for the intervals.

Abstract: Methods and apparatuses provide for referencing thread local variables (TLVs) with techniques such as stack address mapping. A method may involve a head pointer that points to a set of thread local variables (TLVs) of a thread. A method according to one embodiment may include an operation for storing the head pointer in a global data structure in a user space of a processing system. The head pointer may subsequently be retrieved from the global data structure and used to access one or more TLVs associated with the thread. In one embodiment, the head pointer is retrieved without executing any kernel system calls. In an example embodiment, the head pointer is stored in a global array, and a stack address for the thread is used to derive an index into the array. Other embodiments are described and claimed.

Abstract: A heap organization for a multitasking virtual machine is described. The heap organization may comprise an execution engine to concurrently execute a plurality of tasks and a plurality of heaps coupled to the execution engine. In some embodiments, the plurality of heaps may comprise a system heap and a task heap separated from the system heap. The system heap may store system data accessible by the plurality of tasks. The task heap may store task data only accessible by one task of the plurality of tasks.

Abstract: A multitasking virtual machine is described. The multitasking virtual machine may comprise an execution engine to concurrently execute a plurality of tasks. The multitasking virtual machine may further comprise a heap organization coupled to the execution engine. The heap organization may comprise a system heap to store system data accessible by the plurality of tasks; and a plurality of task heaps. Each of the plurality of task heaps may be assigned to each of the plurality of tasks to store task data accessible by the assigned task. The multitasking virtual machine may further comprise a heap manager to manage the heap organization. The heap manager may comprise a heap size controller to control heap size of the system heap.

Abstract: An example apparatus and method described herein involves determining if a class object has been dynamically loaded, performing an escape analysis on the program code and determining if assumptions made during an initial escape analysis are valid. Additionally, the example apparatus and method restore synchronization to at least a portion of the program code affected by loading of the class object if the assumptions made during the initial escape analysis are no longer valid.

Abstract: In one embodiment, the present invention includes a method for constructing a data dependency graph (DDG) for a loop to be transformed, performing statement shifting to transform the loop into a first transformed loop according to at least one of first and second algorithms, performing unimodular and echelon transformations of a selected one of the first or second transformed loops, partitioning the selected transformed loop to obtain maximum outer level parallelism (MOLP), and partitioning the selected transformed loop into multiple sub-loops. Other embodiments are described and claimed.

Abstract: A method and apparatus for reducing the effect of soft errors in a computer system is provided. Soft errors are detected by combining software redundant threading and instruction duplication. Upon detection of a soft error, errors are recovered through the use of software check pointing/rollback technology. Reliable regions are identified by vulnerability profiling and redundant multi-threading is applied to the identified reliable regions.

Abstract: Executing an instruction on an operand stack, including performing a stack-state aware translation of the instruction to threaded code to determine an operand stack state for the instruction, dispatching the instruction according to the operand stack state for the instruction, and executing the instruction.

Abstract: A virtual machine in a processing system manages type information for operands. In one embodiment, the virtual machine accomplishes the following results through execution of a single instruction: adding an operand tag to a tag stack, and updating a stack pointer for the tag stack to recognize the addition of the operand tag to the tag stack. The single instruction may be a shift instruction, for example. The tag stack may reside in a tag stack register, and each operand tag may indicate whether a corresponding operand on an operand stack is to be treated as a reference operand or a non-reference operand. Other embodiments are described and claimed.

Abstract: A method and system are provided for improving inlining using stack trace cache-based dynamic profiling. In one embodiment, a relationship map is provided to map a key representing a caller-callee relationship with a corresponding value indicating a frequency of call site executions. Whether a last stack frame of a stack frame trace is cached is determined. A caller-callee relationship is recorded if the last stack frame is not cached, wherein the caller-callee relationship is recorded in the relationship map, and the relationship map is updated with the recorded caller-callee relationship and then monitored via a recompilation scheduler, the monitoring to determine when a compilation or recompilation of callers and callees is to be performed. A turning on or turning off of dynamic profiling is conducted to perform partial unwinding of the frames in the stack trace.

Abstract: A compact object header in which least significant bits of the compact object header store additional information.

Abstract: In one embodiment, the present invention includes a method for storing a method bundle in code which may include method metadata and a cookie indicator to indicate the presence of method information. After such storage, a query may be performed to search for the method bundle around a queried instruction pointer.

Abstract: A method for registering an utterance and an associated destination anchor with a speech recognition engine. The method includes getting a list of all nodes with links in a document being displayed by a browser by using a programmatic interface provided by the browser. For each node in the list of all nodes, the method gets a destination anchor for the node. If the destination anchor exists, the method forms the utterance by recursively collecting text from subnodes of the node. The utterance and the destination anchor a registered with the speech recognition engine.

Abstract: Methods and apparatus for identifying a type of a software object are disclosed. The methods and apparatus encode data associated with the software object based at least in part on the type of the software object and compare the encoded data with a value associated with a target object type to identify the type of the software object.