Abstract: A method, apparatus, and system are provided for integrating mark bits and allocation bits. According to one embodiment, a single space is allocated for accommodating a mark bit and an allocation bit. The mark bit and the allocation bit are integrated into a mark/allocation bit using the single space allocated. The mark/allocation bit then used to correspond to an object in a heap.

Abstract: A method for statement shifting to increase the parallelism of loops includes constructing a data dependence graph (DDG) to represent dependences between statements in a loop, constructing a basic equations group from the DDG, constructing a dependence equations group derived in part from the basic equations group, and determining a shifting vector for the loop from the dependence equations group, wherein the shifting vector to represent an offset to apply to each statement in the loop for statement shifting. Other embodiments are also disclosed.

Abstract: Methods and apparatus are disclosed to intelligently place a managed heap in a memory. An example method disclosed herein identifies a current boundary of a static data region in memory, and sets a lower boundary of the managed heap at an address located a safeguard distance above the identified current boundary of the static data region in memory. Other embodiments may be described and claimed.

Abstract: A location to insert stack clearing code into a method to be executed in an execution environment of a computer system is determined. The stack clearing code is inserted into the location of the method. The stack clearing code is executed during execution of the method to clear a stack. Other embodiments are also described and claimed.

Abstract: Method, apparatus and system embodiments to schedule user-level OS-independent “shreds” without intervention of an operating system. For at least one embodiment, the shred is scheduled for execution by a scheduler routine rather than the operating system. The scheduler routine may receive compiler-generated hints from a compiler. The compiler hints may be generated by the compiler without user-provided pragmas, and may be passed to the scheduler routine via an API-like interface. The interface may include a scheduling hint data structure that is maintained by the compiler. Other embodiments are also described and claimed.

Abstract: Linear transformations of statements in code are performed to generate linear expressions associated with the statements. Parallel code is generated using the linear expressions. Generating the parallel code includes splitting the computation-space of the statements into intervals and generating parallel code for the intervals.

Abstract: Systems and methods perform affine partitioning on a code stream to produce code segments that may be parallelized. The code segments include copies of the original code stream with conditional inserted that aid in parallelizing code. The conditional is formed by determining the constraints on a processor variable determined by the affine partitioning and applying the constraints to the original code stream.

Abstract: Code is affine partitioned to generate affine partitioning mappings. Parallel code is generated based on the affine partitioning mappings. Generating the parallel code includes coalescing loops in the parallel code generated from the affine partitioning mappings to generate coalesced parallel code and optimizing the coalesced parallel code.

Abstract: Methods for optimizing stream operator processing by creating a system of inequalities to describe a multi-dimensional polyhedron, solving the system by projecting the polyhedron into a space of one fewer dimensions, and mapping the solution into the stream program. Other program optimization methods based on affine partitioning are also described and claimed.

Abstract: A system of permitting stack allocation in a program with open-world features is described. The system includes an escape analysis module to (1) determine which objects of the program can be stack-allocated under a closed-world assumption and (2) analyze, after stack allocation, which stack allocation is invalidated due to the occurrence of an open-world feature. A stack allocation module is provided to stack-allocate these objects based on the determination of the escape analysis module. A stack allocation recovery module is provided to recover those invalidated stack allocations back to their original allocation in heap based on the analysis of the escape analysis module. A method of permitting stack allocation in a program with open-world features is also described.

Abstract: A method including providing a stream of content to a processor, transforming kernels within the stream of content through affine modeling, transforming the affine modeled kernels, stream contracting kernel processes, and stream blocking the kernel processes.

Abstract: A technique includes generating frames on a stack for a chain of callers. Each frame corresponds to one of the callers, and at least some of the callers use an object that survives at least one but not all of the callers. The technique includes retaining at least one of the frames on stack after the corresponding caller ceases to exist.

Abstract: Translating a virtual machine instruction into a value which when logically combined with a base value yields an address of interpretation code to perform the virtual machine instruction.

Abstract: An arrangement is provided for using a stack trace cache when performing root set enumeration in a stack of a thread during garbage collection. During the first root set enumeration in the stack, full stack unwinding may be performed and a stack trace cache may be created to cache stack trace information relating to stack frames. Subsequent sessions of root set enumeration in the stack may access and copy parts or the entire cached stack trace information instead of performing full stack unwinding.

Abstract: Provided are a method, system, and article of manufacture, wherein a plurality of objects are allocated in dynamic memory. Reversed references are determined for the plurality of objects, wherein a reversed reference corresponding to an object is an address of a location that has a valid reference to the object. Unreferenced objects are deleted to fragment the dynamic memory. The fragmented dynamic memory is compacted via adjustments to the reversed references.

Abstract: Methods and apparatuses provide for referencing thread local variables (TLVs) with techniques such as stack address mapping. A method may involve a head pointer that points to a set of thread local variables (TLVs) of a thread. A method according to one embodiment may include an operation for storing the head pointer in a global data structure in a user space of a processing system. The head pointer may subsequently be retrieved from the global data structure and used to access one or more TLVs associated with the thread. In one embodiment, the head pointer is retrieved without executing any kernel system calls. In an example embodiment, the head pointer is stored in a global array, and a stack address for the thread is used to derive an index into the array. Other embodiments are described and claimed.

Abstract: In an embodiment of the invention, a technique includes assigning a first pointer to an address of an array and using the first pointer to identify a first location of first data of the array. The first pointer is used to locate at least one additional pointer to identify at least one additional location of additional data of the array.

Abstract: Methods and apparatus are disclosed to intelligently place a managed heap in a memory. An example method disclosed herein identifies a current boundary of a static data region in memory, and sets a lower boundary of the managed heap at an address located a safeguard distance above the identified current boundary of the static data region in memory. Other embodiments may be described and claimed.

Abstract: Executing an instruction on an operand stack, including performing a stack-state aware translation of the instruction to threaded code to determine an operand stack state for the instruction, dispatching the instruction according to the operand stack state for the instruction, and executing the instruction.

Abstract: A technique includes querying method information in execution environments for programs written for virtual machines. This technique limits the searching scope within a relatively smaller region of the queried instruction pointer (IP) or code address and relieves the management overhead of a method lookup table, with garbage collector facilitation. In one embodiment, a system receives a code address and queries method metadata for the code address by limiting the search scope within a local memory sub-region of the code address.