Patents by Inventor Garry Renner

Garry Renner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8717774
    Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one power feed-through capacitor is provided. The capacitor is mounted on the first planar face with the first external termination in direct electrical contact with a first upper connection and the second external termination is in direct electrical contact with a second upper connection. At least one upper connection, first external termination and second external termination are arranged for direct electrical contact with element contact pads of a common element.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: May 6, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Garry Renner, John D. Prymak, Azizuddin Tajuddin
  • Patent number: 8331078
    Abstract: A multi-layered ceramic capacitor with at least one chip and with first base metal plates in a parallel spaced apart relationship and second base metal plates in a parallel spaced apart relationship wherein the first plates and second plates are interleaved. A dielectric is between the first base metal plates and said second base metal plates and the dielectric has a first coefficient of thermal expansion. A first termination is in electrical contact with the first plates and a second termination is in electrical contact with the second plates. Lead frames are attached to, and in electrical contact with, the terminations wherein the lead frames have a second coefficient of thermal expansion and the second coefficient of thermal expansion is higher than said first coefficient of thermal expansion. The lead frame is a non-ferrous material.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: December 11, 2012
    Assignee: Kemet Electronics Corporation
    Inventors: John E. McConnell, Reggie Phillips, Alan P. Webster, John Bultitude, Mark R. Laps, Lonnie G. Jones, Garry Renner
  • Publication number: 20120081870
    Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one power feed-through capacitor is provided. The capacitor is mounted on the first planar face with the first external termination in direct electrical contact with a first upper connection and the second external termination is in direct electrical contact with a second upper connection. At least one upper connection, first external termination and second external termination are arranged for direct electrical contact with element contact pads of a common element.
    Type: Application
    Filed: November 9, 2011
    Publication date: April 5, 2012
    Applicant: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Garry Renner, John D. Prymak, Azizuddin Tajuddin
  • Patent number: 8111524
    Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one power feed-through capacitor is provided. The capacitor has a plurality of parallel plates with a dielectric there between. At least one first external termination is in electrical contact with a first set of alternate parallel plates and at least one second external termination is in electrical contact with a second set of alternate parallel plates.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: February 7, 2012
    Assignee: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Garry Renner, John D. Prymak, Azizuddin Tajuddin
  • Publication number: 20100243307
    Abstract: A multi-layered ceramic capacitor with at least one chip and with first base metal plates in a parallel spaced apart relationship and second base metal plates in a parallel spaced apart relationship wherein the first plates and second plates are interleaved. A dielectric is between the first base metal plates and said second base metal plates and the dielectric has a first coefficient of thermal expansion. A first termination is in electrical contact with the first plates and a second termination is in electrical contact with the second plates. Lead frames are attached to, and in electrical contact with, the terminations wherein the lead frames have a second coefficient of thermal expansion and the second coefficient of thermal expansion is higher than said first coefficient of thermal expansion. The lead frame is a non-ferrous material.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 30, 2010
    Inventors: John E. McConnell, Reggie Phillips, Alan P. Webster, John Bultitude, Mark R. Laps, Lonnie G. Jones, Garry Renner
  • Patent number: 7545623
    Abstract: A capacitor array with a multiplicity of capacitors with terminations of alternating polarity wherein the terminations are arranged in M columns and N rows. A circuit is provided with terminations in a grid of L columns and K rows wherein the terminations are of alternating polarity with the proviso that a first terminal with L={acute over (?)}M has the same polarity as a second terminal with L={acute over (?)}M+1 wherein {acute over (?)} is an integer.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: June 9, 2009
    Assignee: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Garry Renner
  • Publication number: 20080236717
    Abstract: A process for forming a multilayer ceramic capacitor. The process includes depositing a ceramic precursor on a substrate and an electrode ink in a predetermined pattern on the ceramic precursor to form a green sheet. The electrode ink has an adhesion promoter incorporated therein. The green sheet is overlayed with at least one second green sheet to form a layered green sheet which is then fused under pressure.
    Type: Application
    Filed: May 7, 2008
    Publication date: October 2, 2008
    Inventors: Abhijit Gurav, Azizuddin Tajuddin, Daniel Skamser, Garry Renner, March Maguire, Michael S. Randall, Randal Vaughan
  • Publication number: 20080192452
    Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one capacitor is provided. The capacitor has a plurality of parallel plates with a dielectric there between. At least one first external termination is in electrical contact with a first set of alternate parallel plates and at least one second external termination is in electrical contact with a second set of alternate parallel plates.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 14, 2008
    Inventors: Michael S. Randall, Garry Renner, John D. Prymak, Azizuddin Tajuddin
  • Publication number: 20080123247
    Abstract: A capacitor array with a multiplicity of capacitors with terminations of alternating polarity wherein the terminations are arranged in M columns and N rows. A circuit is provided with terminations in a grid of L columns and K rows wherein the terminations are of alternating polarity with the proviso that a first terminal with L={acute over (?)}M has the same polarity as a second terminal with L={acute over (?)}M+1 wherein {acute over (?)} is an integer.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 29, 2008
    Inventors: Michael S. Randall, Garry Renner
  • Patent number: 7280342
    Abstract: A low inductance multi-layer capacitor. The capacitor comprises interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate comprises two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead-out tabs of the even internal electrode plates, and a second external electrode terminal is electrically connected to the lead-out tabs of the odd internal electrode plates. The external electrode terminals are on a common first exterior surface and a common opposing second exterior surface of the capacitor.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: October 9, 2007
    Assignee: Kemet Electronics Corporation
    Inventors: Michael S. Randall, Allen Hill, Peter Blais, Garry Renner, Randal Vaughan, Azizuddin Tajuddin
  • Publication number: 20070165361
    Abstract: A low inductance multi-layer capacitor. The capacitor comprises interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate comprises two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead-out tabs of the even internal electrode plates, and a second external electrode terminal is electrically connected to the lead-out tabs of the odd internal electrode plates. The external electrode terminals are on a common first exterior surface and a common opposing second exterior surface of the capacitor.
    Type: Application
    Filed: December 15, 2006
    Publication date: July 19, 2007
    Inventors: Michael S. Randall, Allen Hill, Peter Blais, Garry Renner, Randal Vaughan, Azizuddin Tajuddin
  • Patent number: 6495808
    Abstract: A ceramic heater having an alumina rod, an alumina based ribbon sintered to the rod, and a platinum resistor element bonded to the ribbon. Additionally, a method of making a ceramic heater having the steps of making a ceramic slurry; combining the ceramic slurry with a binder component to form a slip; depositing the slip onto a carrier film at a controlled thickness such that a deposited slip is formed; heat curing the deposited slip to form a cured slip ribbon; applying a platinum paste onto the ribbon in a specific pattern, the paste forming a platinum resistor element on the ribbon; applying the ribbon with the platinum resistor element onto an alumina rod; and, heating the rod with the ribbon and the platinum resistor element thereon, whereby the ribbon is sintered to the rod and the platinum resistor element is sintered and bonded to the ribbon.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: December 17, 2002
    Inventors: Mark A. Clayton, Garry Renner, Mark J. Cresanti