Patents by Inventor Gary J. Ballantyne

Gary J. Ballantyne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6909331
    Abstract: A communications system using a phase locked loop employing two-point modulation is disclosed. The phase locked loop further includes a master oscillator having an output operably coupled to a first input of the phase detector; a slave oscillator having an output operably coupled to a second input of the phase detector, and a forward-gain-adaptation module having a first input operably coupled to the raw-error terminal of the phase detector.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: June 21, 2005
    Assignee: Qualcomm Incorporated
    Inventor: Gary J. Ballantyne
  • Publication number: 20040184559
    Abstract: A quadra-polar modulator that is simple to implement and also provides good noise performance. The quadra-polar modulator includes four amplitude modulators and a combiner. Each amplitude modulator modulates a respective carrier signal with a respective input signal to provide a respective output signal. The combiner then combines the four output signals from the four amplitude modulators to provide a modulated signal. Each amplitude modulator may be implemented with a switching amplifier, such as a supply modulated class E amplifier. Two input signals are obtained by summing separately an inphase (I) modulating signal and an inverted I modulating signal with an offset value. The other two input signals are obtained by summing separately a quadrature (Q) modulating signal and an inverted Q modulating signal with the offset value. The offset value can be selected based on the expected magnitude of the modulating signals. The four carrier signals are in quadrature to each other.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 23, 2004
    Inventor: Gary J. Ballantyne
  • Patent number: 6774508
    Abstract: A battery (102) powers a wireless telephone's power amplifier (106) through a Switch Mode Power Supply (SMPS) (104). The SMPS has a capacity lower than the maximum power requirements of the amplifier. When a controller (116) senses that an amplifier power-requirement threshold has been exceeded, it closes a switch (114) parallel to the SMPS, allowing power to flow from the battery to the amplifier without passing through the SMPS. This architecture allows the use of a smaller SMPS, and eliminates SMPS-generated noise to the amplifier when the amplifier is least able to tolerate such noise, namely, under high power conditions.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: August 10, 2004
    Assignee: Qualcomm Incorporated
    Inventors: Gary J. Ballantyne, Keith Bargroff, Paul L. Chan, Jonathan Klaren, Charles J. Persico, Walter Scott Charles, Somphou Sithideth
  • Publication number: 20040041636
    Abstract: A communications system using a phase locked loop employing two-point modulation is disclosed. The phase locked loop further includes a master oscillator having an output operably coupled to a first input of the phase detector; a slave oscillator having an output operably coupled to a second input of the phase detector, and a forward-gain-adaptation module having a first input operably coupled to the raw-error terminal of the phase detector.
    Type: Application
    Filed: May 20, 2003
    Publication date: March 4, 2004
    Inventor: Gary J. Ballantyne
  • Publication number: 20030006651
    Abstract: A battery (102) powers a wireless telephone's power amplifier (106) through a Switch Mode Power Supply (SMPS) (104). The SMPS has a capacity lower than the maximum power requirements of the amplifier. When a controller (116) senses that an amplifier power-requirement threshold has been exceeded, it closes a switch (114) parallel to the SMPS, allowing power to flow from the battery to the amplifier without passing through the SMPS. This architecture allows the use of a smaller SMPS, and eliminates SMPS-generated noise to the amplifier when the amplifier is least able to tolerate such noise, namely, under high power conditions.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 9, 2003
    Inventors: Gary J. Ballantyne, Keith Bargroff, Paul L. Chan, Jonathan Klaren, Charles J. Persico, Walter Scott Charles, Somphou Sithideth
  • Patent number: 6271722
    Abstract: A power amplifier circuit arrangement particularly useful for portable phones used in wireless systems. A power amplifier stage can be partially or completely bypassed so that multi-stage amplifiers can be built that allow wide dynamic range of power amplification to be obtained efficiently. A switch at the input of an amplifier stage couples an input signal either to an amplifier or to a bypass path. The output of the amplifier is coupled to a first impedance-transforming network. The bypass path includes a second impedance-transforming network. A third impedance transforming network couples the outputs of the first and second impedance transforming networks. The impedance transforming networks are constructed and arranged so that input and output signals see the correct load regardless of whether the amplifier is used or bypassed. Using the principles of this invention, multi-stage amplifiers can be constructed including input and bypass attenuators to achieve a wide range of gain levels.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: August 7, 2001
    Assignee: Qualcomm Inc.
    Inventor: Gary J. Ballantyne
  • Patent number: 6069526
    Abstract: A power amplifier circuit arrangement particularly useful for portable phones used in wireless systems. A power amplifier stage can be partially or completely bypassed so that multi-stage amplifiers can be built that allow wide dynamic range of power amplification to be obtained efficiently. A switch at the input of an amplifier stage couples an input signal either to an amplifier or to a bypass path. The output of the amplifier is coupled to a first impedance-transforming network. The bypass path includes a second impedance-transforming network. A third impedance transforming network couples the outputs of the first and second impedance transforming networks. The impedance transforming networks are constructed and arranged so that input and output signals see the correct load regardless of whether the amplifier is used or bypassed. Using the principles of this invention, multi-stage amplifiers can be constructed including input and bypass attenuators to achieve a wide range of gain levels.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: May 30, 2000
    Assignee: Qualcomm Incorporated
    Inventor: Gary J. Ballantyne