Abstract: A method of controlling a clock signal with a print controller is provided. In response to receiving an external signal, the print controller determines the number of cycles of a clock signal generated by a ring oscillator of the print controller during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and outputs the determined number of cycles to an external circuit. In response to receiving a trim value from clock trim circuitry of the print controller which trims the frequency of the clock signal based on the determined number of cycles from the external circuit, the trim value is stored in memory of the print controller. The clock trim circuitry is controlled to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: A force sensor is provided which has a capacitive sensor circuit incorporating a sensor capacitor having variable capacitance Csen arranged so that an output of the capacitive sensor circuit is proportional to 1/Csen.

Abstract: A print engine comprising at least one print controller and at least one associated authentication device is provided. Each authentication device having a processor, a memory that the processor can access, a memory access unit for controlling accesses to the memory, an input for receiving power for the authentication device from an external power source, and a power detection unit. The processor is configured to control and trim the amount of power supplied to the input to predetermine a threshold at which operation of the authentication device is established.

Abstract: A print engine comprising at least one print controller and at least one associated authentication device is provided. Each authentication device has a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit. Each authentication device is configured to enable multi-word writes to the non-volatile memory under control of the associated print controller. The processor is configured to control and trim the amount of power supplied to the input to predetermine a threshold at which operation of the authentication device is established. The power detection unit is configured to monitor a voltage level of the power supplied to the input, and in the event the voltage level drops below the predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.

Abstract: A method of controlling a clock signal with a print controller is provided. In response to receiving an external signal, the print controller determines the number of cycles of a clock signal generated by a ring oscillator of the print controller during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and outputs the determined number of cycles to an external circuit. In response to receiving a trim value from clock trim circuitry of the print controller which trims the frequency of the clock signal based on the determined number of cycles from the external circuit, the trim value is stored in memory of the print controller. The clock trim circuitry is controlled to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: A method performed by a quality assurance integrated circuit for a print controller, the quality assurance integrated circuit comprising a memory; a system clock for generating a clock signal; clock trim circuitry for trimming the frequency of the clock signal; and a processor. the method includes, in the processor, in response to receiving an external signal, determining the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit; and in response to receiving a trim value based on the determined number of cycles from the external circuit, storing the trim value in the memory and controlling the clock trim circuitry to trim the frequency of the clock signal using the trim value.

Abstract: A force sensor is provided having a capacitive sensor circuit incorporating a sensor capacitor having a variable capacitance Csen and a reference capacitor relatively arranged so that the capacitive sensor circuit is near saturation when Csen is at a minimum expected value.

Abstract: A sensing device is provided for interacting with a substrate. The sensing device has a force sensor for detecting whether the sensing device is interacting with the substrate and an image sensor for sensing coded data disposed on the substrate. The force sensor has a capacitive sensor circuit incorporating a sensor capacitor having a variable capacitance Csen and a reference capacitor relatively arranged so that the capacitive sensor circuit is near saturation when Csen is at a minimum expected value.

Abstract: A sensing device is provided for interacting with a substrate. The sensing device has a force sensor for detecting whether the sensing device is interacting with the substrate and an image sensor for sensing coded data disposed on the substrate. The force sensor has a capacitive sensor circuit incorporating a sensor capacitor having variable capacitance Csen arranged so that an output of the capacitive sensor circuit is proportional to 1/Csen.

Abstract: A force sensor is provided which has a capacitive sensor circuit incorporating a sensor capacitor having variable capacitance Csen arranged so that an output of the capacitive sensor circuit is proportional to 1/Csen.

Abstract: A method performed by a quality assurance integrated circuit for a print controller, the quality assurance integrated circuit comprising a memory; a system clock for generating a clock signal; clock trim circuitry for trimming the frequency of the clock signal; and a processor. the method includes, in the processor, in response to receiving an external signal, determining the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit; and in response to receiving a trim value based on the determined number of cycles from the external circuit, storing the trim value in the memory and controlling the clock trim circuitry to trim the frequency of the clock signal using the trim value.

Abstract: A quality assurance integrated circuit for a print controller is provided. The IC has a memory, a system clock having a ring oscillator for generating a clock signal, clock trim circuitry for trimming the clock signal generated by the system clock and a processor. The processor is arranged to, in response to receiving an external signal, determine the number of cycles of the clock or external signal during a predetermined number of cycles of the external or clock signal, respectively and to output the determined number of cycles to an external circuit, and, in response to receiving a trim value based on the determined number of cycles from the external circuit, store the trim value in the memory and control the clock trim circuitry to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: An integrated circuit comprising a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit, wherein the integrated circuit is configured to enable multi-word writes to the non-volatile memory, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.

Abstract: An integrated circuit comprising a processor, a memory that the processor can access, a memory access unit for controlling accesses to the memory, an input for receiving power for the integrated circuit from an external power source, and a power detection unit, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, disabling a power supply to circuitry for use in writing to the memory, such that the memory access unit's ability to alter data in the memory is disabled prior to address or data values to be written to the memory becoming unreliable due to failing power.

Abstract: A print engine comprising at least one print controller and at least one associated authentication device is provided. Each authentication device having a processor, a memory that the processor can access, a memory access unit for controlling accesses to the memory, an input for receiving power for the authentication device from an external power source, and a power detection unit. The processor is configured to control and trim the amount of power supplied to the input to predetermine a threshold at which operation of the authentication device is established.

Abstract: The present invention provides an ink ejection type printhead having a plurality of ink ejection devices and a central axis, the ink ejection devices arranged in a series of groups, each of the groups generally extending along at least partially curved radial lines.

Abstract: An integrated circuit is provided comprising a processor, an onboard system clock having a ring oscillator for generating a clock signal, a memory, and clock trim circuitry. The processor is arranged to, in response to receiving an external signal, determine the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit. The processor is also arranged to, in response to receiving a trim value based on the determined number of cycles from the external circuit, store the trim value in the memory and control the clock trim circuitry to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: A quality assurance integrated circuit for a print controller is provided. The IC has a memory, a system clock having a ring oscillator for generating a clock signal, clock trim circuitry for trimming the clock signal generated by the system clock and a processor. The processor is arranged to, in response to receiving an external signal, determine the number of cycles of the clock or external signal during a predetermined number of cycles of the external or clock signal, respectively and to output the determined number of cycles to an external circuit, and, in response to receiving a trim value based on the determined number of cycles from the external circuit, store the trim value in the memory and control the clock trim circuitry to trim the frequency of the clock signal generated by the ring oscillator using the trim value.

Abstract: An inkjet printhead with a substrate having a plurality of inkjet nozzles formed in the substrate; the inkjet nozzles being arranged in groups, each group extending generally along a respective line along the substrate; wherein, at least two of the lines are intersecting, provides a printhead design that is well suited to use in a universal pen capable of changing the attributes of the marks it makes on a surface.

Abstract: The present invention provides an ink ejection type printhead having a plurality of ink ejection devices and a central axis, the ink ejection devices arranged in a series of groups, each of the groups generally extending along non parallel lines.