Patents by Inventor Gaurav Chandra

Gaurav Chandra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200061564
    Abstract: A system and method are directed toward the synthesis of polymeric capsules using a phase inversion process by extrusion of polymeric droplets through a syringe-needle assembly or an iris-shutter mechanism. The polymeric solution may be prepared by dissolving PAN (polyacrylonitrile) polymer in DMF (Dimethyl Formamide) solvent at high temperature through continuous stirring. Following preparation of the capsules, further treatment was initiated using triethylamine in gelation bath to make the final product an efficient removal agent of water hardness.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Somak Chatterjee, Sharath Chandra Prasad, Srinivas Pasham, Balaji Srinivasan, Gaurav Kumar Verma, Andrew Reinhard Krause, Gregory Sergeevich Chernov
  • Publication number: 20190248773
    Abstract: The present invention provides improved, commercially viable and consistently reproducible processes for the preparation of pure and stable crystalline Raltegravir potassium Form 3 and pharmaceutical composition thereof.
    Type: Application
    Filed: September 13, 2017
    Publication date: August 15, 2019
    Inventors: Purna Chandra Ray, Samir Shanteshwar Shabade, Surinder Kumar Arora, D. Rajput Lalitkumar, B. Shivdavkar Radhakrishna, G. Varade Shantanu, D. Ausekar Govind, Girij Pal Singh, Shreyas Pandurang Deshmukh, Gaurav Amrut Patil
  • Patent number: 10367515
    Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: July 30, 2019
    Assignee: Maxlinear, Inc.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Patent number: 10308579
    Abstract: An improved method of manufacture of a bisphenol comprises heating a monohydric phenol to a first temperature sufficient to melt the monohydric phenol; adding a carbonyl compound to 2.0-3.0 molar equivalents, based on the moles of carbonyl compound, of the monohydric phenol in the presence of catalytic amounts of an organosulfonic acid catalyst and a reaction promoter at a second temperature sufficient to maintain unreacted monohydric phenol in a molten state; increasing the temperature to a third temperature higher than the second temperature, and mixing for a time sufficient to produce the bisphenol in a yield of 80 to 100%, based on the amount of carbonyl compound; wherein mineral acids, Lewis acids, and ion exchange resins are not used. The method is applicable to the manufacture of 2,2-bis(3,5-dimethyl-4-hydroxyphenyl)propane, a useful intermediate for the manufacture of bi-functional poly(phenylene ether)s.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: June 4, 2019
    Assignee: SABIC GLOBAL TECHNOLOGIES B.V.
    Inventors: Satish Chandra Pandey, Gaurav Mediratta, Alvaro Carrillo
  • Patent number: 10312928
    Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: June 4, 2019
    Assignee: MAXLINEAR, INC.
    Inventors: Kaveh Moazzami, Pawan Tiwari, Gaurav Chandra
  • Patent number: 10291246
    Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: May 14, 2019
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Publication number: 20190115929
    Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 18, 2019
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Patent number: 10224946
    Abstract: Systems and methods are provided for managing dynamic element matching (DEM) in digital-to-analog converters (DACs). One or more parameters associated with the DAC and/or a signal being converted via the DAC; and based on the one or more parameters, conditions affecting dynamic element matching in the DAC may be assessed. Based on the assessing of the conditions, one or more adjustments may be determined and dynamically applied to the dynamic element matching in the DAC.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: March 5, 2019
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop
  • Publication number: 20190044524
    Abstract: In a digital-to-analog converter (DAC) that includes one or more conversion circuits, with each conversion circuit configured to handle one or more bits in an input signal to the DAC, one or more types of errors that occur during operation of the DAC may be detected, and one or more adjustments may be determined for correcting the one or more types of errors that occur during operation of the DAC and/or for reducing effects resulting from the one or more types of errors. At least one of the one or more adjustments may applied, with the at least one of the one or more adjustments is applied to only a subset of one or more conversion circuits. The DAC may be adaptive switched among a plurality of modes, and adjustments may be applied only in one or more of the modes but not in all of the modes.
    Type: Application
    Filed: October 9, 2018
    Publication date: February 7, 2019
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop
  • Patent number: 10158368
    Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: December 18, 2018
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Patent number: 10097195
    Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: October 9, 2018
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop
  • Publication number: 20180287624
    Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
    Type: Application
    Filed: June 4, 2018
    Publication date: October 4, 2018
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Publication number: 20180269891
    Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
    Type: Application
    Filed: May 18, 2018
    Publication date: September 20, 2018
    Inventors: Kaveh Moazzami, Pawan Tiwari, Gaurav Chandra
  • Publication number: 20180226980
    Abstract: Systems and methods are provided for managing dynamic element matching (DEM) in digital-to-analog converters (DACs). One or more parameters associated with the DAC and/or a signal being converted via the DAC; and based on the one or more parameters, conditions affecting dynamic element matching in the DAC may be assessed. Based on the assessing of the conditions, one or more adjustments may be determined and dynamically applied to the dynamic element matching in the DAC.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 9, 2018
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop
  • Patent number: 10003350
    Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 19, 2018
    Assignee: MAXLINEAR, INC.
    Inventors: Kaveh Moazzami, Pawan Tiwari, Gaurav Chandra
  • Patent number: 9991899
    Abstract: Systems and methods are provided for adaptive configuration and control of digital-to-analog converters (DACs). Performance of a plurality of conversion elements in a digital-to-analog converter (DAC) may be assessed based on particular input conditions associated with a digital input to the DAC, and the DAC may be configured based on the assessing of performance. Each conversion element of the plurality of conversion elements handles a particular bit in the digital input. The configuring may comprise selecting a subset of the plurality of conversion elements, and setting only the subset of the plurality of conversion elements to apply a particular type of operations. The particular type of operations pertains to applying digital-to-analog conversions via the DAC, and the particular type of operations relates to or affects performance. The particular input conditions may comprise signal backoff.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: June 5, 2018
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Publication number: 20180097524
    Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
    Type: Application
    Filed: September 11, 2017
    Publication date: April 5, 2018
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop
  • Publication number: 20180062663
    Abstract: Systems and methods are provided for adaptive configuration and control of digital-to-analog converters (DACs). Performance of a plurality of conversion elements in a digital-to-analog converter (DAC) may be assessed based on particular input conditions associated with a digital input to the DAC, and the DAC may be configured based on the assessing of performance. Each conversion element of the plurality of conversion elements handles a particular bit in the digital input. The configuring may comprise selecting a subset of the plurality of conversion elements, and setting only the subset of the plurality of conversion elements to apply a particular type of operations. The particular type of operations pertains to applying digital-to-analog conversions via the DAC, and the particular type of operations relates to or affects performance. The particular input conditions may comprise signal backoff.
    Type: Application
    Filed: October 23, 2017
    Publication date: March 1, 2018
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Publication number: 20170359080
    Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.
    Type: Application
    Filed: June 26, 2017
    Publication date: December 14, 2017
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu
  • Patent number: 9800254
    Abstract: Systems and methods are provided for digital-to-analog converter (DAC) with partial constant switching. A digital-to-analog converter (DAC) comprising a plurality of conversion elements may be configured to apply constant switching in only some of the conversion elements. Only conversion elements applying constant switching may incorporate circuitry for providing such the constant switching. Alternatively, each conversion element may incorporate constant switching circuitry and functionality, and the constant switching may then be turned on or off for each conversion element adaptively, such as based on input conditions.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: October 24, 2017
    Assignee: MAXLINEAR, INC.
    Inventors: Gaurav Chandra, Tao Zeng, Shantha Murthy Prem Swaroop, Jianyu Zhu