Patents by Inventor Gaurav Sinha
Gaurav Sinha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12360691Abstract: Implementations described herein relate to memory device initialization. In some implementations, a memory device may perform a first initialization for a first set of memory resources, the first initialization being associated with a boot image initialization. The memory device may enable a sideband interface, for data transfer between the memory device and a host device, based on a completion of the first initialization. The memory device may perform a second initialization for a second set of memory resources that is larger than the first set of memory resources. The memory device may enable a peripheral component interconnect express interface, for data transfer between the memory device and the host device, based on a completion of the second initialization.Type: GrantFiled: March 12, 2024Date of Patent: July 15, 2025Assignee: Micron Technology, Inc.Inventors: Marco Redaelli, Gaurav Sinha
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Publication number: 20250199816Abstract: A memory sub-system includes a non-volatile memory (NVM) memory device and a processing device operatively coupled to the memory device and to a host system. The processing device includes embedded volatile memory and retrieves, in response to power on of the memory sub-system, a read-only memory (ROM) code from an internal ROM of the processing device. The processing device executes the ROM code to load a boot code, from the memory device, into the embedded volatile memory. The processing device executes the boot code to load a first stage firmware into the embedded volatile memory. The first stage firmware is to enable access to a boot partition of the memory device before the processing device has full operational access to the memory device.Type: ApplicationFiled: November 8, 2024Publication date: June 19, 2025Inventors: Marco Redaelli, Gaurav Sinha
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Publication number: 20250190304Abstract: A processing device in a host system detecting a failure of a memory sub-system coupled to the host system and collects debug information from the memory sub-system via a memory sub-system interface. Responsive to determining that the debug information is not sufficient to correct the failure of the memory sub-system, the processing device performing an authentication process to authenticate the system to the memory sub-system, collects enhanced debug information from the memory sub-system via the memory sub-system interface, and performs one or more corrective actions based on the enhanced debug information to correct the failure of the memory sub-system.Type: ApplicationFiled: October 25, 2024Publication date: June 12, 2025Inventors: Nicholas Terence Heath, Gaurav Sinha
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Publication number: 20250147846Abstract: Methods, systems, and devices for sorting retired blocks of non-volatile memory cells are described. A memory system may recover a block that has been marked as “bad” using a requalification process. For example, after operating in an error protection mode for the block, the memory system may monitor the block to determine whether a status flag indicating an access error is set. If the status flag is set, the memory system may store information that indicates the block is unrecoverable, and the block may subsequently be retired. Alternatively, if a status flag is not set, the memory system may store information that indicates the block may be recoverable. If one or more additional access operations to the block are successful, the memory system may store information that indicates the block may be used for subsequent access operations.Type: ApplicationFiled: July 17, 2024Publication date: May 8, 2025Inventors: Marco Redaelli, Gaurav Sinha, Zhang Lei
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Publication number: 20250063049Abstract: Systems and methods receive and authenticate authentication information to access a first user profile of a first computer program, and determine whether the first user profile is integrated with a second user profile of a second computer program. Access is provided based on the authenticating, and profile information of the first user profile is displayed via a user interface. Profile information comprises interface component(s) associated with the second computer program that include either (i) a first selectable control input, based on determining the first user profile is disparate from the second user profile, for accessing additional information associated with the second computer program, where the additional information depicts selectable option(s) to facilitate downloading the second computer program to the user device, or (ii) a second selectable control input, based on determining the first user profile is integrated with the second user profile, for accessing the second computer program.Type: ApplicationFiled: August 15, 2023Publication date: February 20, 2025Applicant: Truist BankInventors: Vianca Barlis, Gaurav Sinha
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Publication number: 20250013384Abstract: Methods, systems, and devices for multi-host communications are described. In some examples, a memory system may be coupled with multiple host systems. The memory system may facilitate communications between the multiple host systems For example, a first host system may be coupled with a first buffer of the memory system and a second host system may be coupled with a second buffer of the memory system. The first host system may have read and write access to the first buffer and read access to the second buffer. In response to a write operation being initiated by the first host system, data may be written to the first buffer. The second host system may read the data written to the first buffer. The second host system may take an action or respond based on the data read from the first buffer.Type: ApplicationFiled: September 17, 2024Publication date: January 9, 2025Inventors: Gaurav Sinha, Marco Redaelli, Shivamurthy Shastri
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Patent number: 12192840Abstract: Disclosed herein is a method and network handover system for handling a data session in a user equipment (UE). The method comprises initiating a data session of at least one application from a plurality of applications with a first communication interface using a first socket of the UE having a first socket file descriptor (SOCKFD) for the data session, detecting a deterioration in a network connection of the first communication interface, identifying a second communication interface, establishing a second socket having a second SOCKFD associated with the second communication interface and migrating the data session from the first communication interface to the second communication interface by mapping the first SOCKFD corresponding to the first socket to the second SOCKFD corresponding to the second socket.Type: GrantFiled: August 14, 2020Date of Patent: January 7, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: Madhan Raj Kanagarathinam, Chounjong Nam, Gaurav Sinha, Gunjan kumar Choudhary, Karthikeyan Arunachalam, Sunghee Lee, Sujith Rengan Jayaseelan, Dronamraju Siva Sabareesh, Harikrishnan Natarajan, Jaheon Gu
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Patent number: 12189943Abstract: Implementations described herein relate to a cluster namespace for a memory device. In some implementations, a memory device may receive a cluster namespace instruction, from a host device, that instructs the memory device to create a cluster namespace using memory resources of the memory device that are spread across a plurality of namespaces of the memory device. The memory device may identify namespace storage information that indicates memory resources associated with a plurality of namespaces of the memory device. The memory device may create the cluster namespace based on creating a plurality of extents that respectively map sets of logical block address ranges from the plurality of namespaces to the cluster namespace.Type: GrantFiled: October 20, 2022Date of Patent: January 7, 2025Assignee: Micron Technology, Inc.Inventors: Gaurav Sinha, Marco Redaelli
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Publication number: 20240411465Abstract: Implementations described herein relate to selective data map unit access. A memory device may receive a request from a host device to access a resource associated with a data map unit. The memory device may identify whether the data map unit is in a locked state or an unlocked state. The data map unit may be in the locked state when another host device currently has exclusive access to the resource or may be in the unlocked state when no other host device currently has exclusive access to the resource. The memory device may selectively grant the host device exclusive access to the resource based on identifying whether the data map unit is in the locked state or the unlocked state.Type: ApplicationFiled: August 22, 2024Publication date: December 12, 2024Inventors: Marco REDAELLI, Gaurav SINHA
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Patent number: 12154042Abstract: In implementations of systems for estimating terminal event likelihood, a computing device implements a termination system to receive observed data describing values of a treatment metric and indications of a terminal event. Values of the treatment metric are grouped into groups using a mixture model that represents the treatment metric as a mixture of distributions. Parameters of a distribution are estimated for each of the groups and mixing proportions are also estimated for each of the groups. In response to receiving a user input requesting an estimate of a likelihood of the terminal event for a particular value of the treatment metric, the termination system generates an indication of the estimate of the likelihood of the terminal event for the particular value based on a distribution density at the particular value for each of the groups and a probability of including the particular value in each of the groups.Type: GrantFiled: August 16, 2021Date of Patent: November 26, 2024Assignee: Adobe Inc.Inventors: Vibhor Porwal, Ayush Chauhan, Aurghya Maiti, Gaurav Sinha, Ruchi Sandeep Pandya
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Publication number: 20240377974Abstract: Implementations described herein relate to memory device initialization. In some implementations, a memory device may perform a first initialization for a first set of memory resources, the first initialization being associated with a boot image initialization. The memory device may enable a sideband interface, for data transfer between the memory device and a host device, based on a completion of the first initialization. The memory device may perform a second initialization for a second set of memory resources that is larger than the first set of memory resources. The memory device may enable a peripheral component interconnect express interface, for data transfer between the memory device and the host device, based on a completion of the second initialization.Type: ApplicationFiled: March 12, 2024Publication date: November 14, 2024Inventors: Marco REDAELLI, Gaurav SINHA
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Patent number: 12112060Abstract: Methods, systems, and devices for multi-host communications are described. In some examples, a memory system may be coupled with multiple host systems. The memory system may facilitate communications between the multiple host systems For example, a first host system may be coupled with a first buffer of the memory system and a second host system may be coupled with a second buffer of the memory system. The first host system may have read and write access to the first buffer and read access to the second buffer. In response to a write operation being initiated by the first host system, data may be written to the first buffer. The second host system may read the data written to the first buffer. The second host system may take an action or respond based on the data read from the first buffer.Type: GrantFiled: September 7, 2022Date of Patent: October 8, 2024Assignee: Micron Technology, Inc.Inventors: Gaurav Sinha, Marco Redaelli, Shivamurthy Shastri
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Patent number: 12086435Abstract: Implementations described herein relate to selective data map unit access. A memory device may receive a request from a host device to access a resource associated with a data map unit. The memory device may identify whether the data map unit is in a locked state or an unlocked state. The data map unit may be in the locked state when another host device currently has exclusive access to the resource or may be in the unlocked state when no other host device currently has exclusive access to the resource. The memory device may selectively grant the host device exclusive access to the resource based on identifying whether the data map unit is in the locked state or the unlocked state.Type: GrantFiled: August 26, 2022Date of Patent: September 10, 2024Assignee: Micron Technology, Inc.Inventors: Marco Redaelli, Gaurav Sinha
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Publication number: 20240289159Abstract: Implementations described herein relate to memory device virtualization. In some implementations, a memory device may perform a boot-up of the memory device and may receive configuration information associated with a single root input-output virtualization for the memory device. The memory device may store the configuration information in a memory of the memory device. The memory device may perform a subsequent boot-up of the memory device. The memory device may retrieve the configuration information from the memory of the memory device after performing the subsequent boot-up of the memory device. The memory device may initiate one or more virtual functions associated with the single root input-output virtualization based on retrieving the configuration information from the memory of the memory device.Type: ApplicationFiled: February 23, 2024Publication date: August 29, 2024Inventors: Gaurav SINHA, Marco REDAELLI
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Publication number: 20240241823Abstract: Implementations described herein relate to a shared function for a multi-port memory device. In some implementations, a memory device may include a first port, a second port, and one or more components configured to manage a shared function of the memory device. The shared function of the memory device may enable a host device that is connected to the first port of the memory device to identify and enumerate the second port of the memory device. In some implementations, the shared function of the memory device may establish a virtual connection between the first port and the second port, and may enable the host device that is connected to the first port of the memory device to share a resource or a function with another host device that is connected to the second port of the memory device.Type: ApplicationFiled: January 16, 2024Publication date: July 18, 2024Inventors: Gaurav SINHA, Marco REDAELLI
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Publication number: 20240231610Abstract: Implementations described herein relate to a cluster namespace for a memory device. In some implementations, a memory device may receive a cluster namespace instruction, from a host device, that instructs the memory device to create a cluster namespace using memory resources of the memory device that are spread across a plurality of namespaces of the memory device. The memory device may identify namespace storage information that indicates memory resources associated with a plurality of namespaces of the memory device. The memory device may create the cluster namespace based on creating a plurality of extents that respectively map sets of logical block address ranges from the plurality of namespaces to the cluster namespace.Type: ApplicationFiled: October 20, 2022Publication date: July 11, 2024Inventors: Gaurav SINHA, Marco REDAELLI
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Patent number: 12008589Abstract: Introduced here are approaches to determining causal relationships in mixed datasets containing data related to continuous variables and discrete variables. To accomplish this, a marketing insight and intelligence platform may employ a multi-phase approach in which dependency is established before the data related to continuous variables is discretized. Such an approach ensures that information regarding dependence is not lost through discretization.Type: GrantFiled: July 31, 2023Date of Patent: June 11, 2024Assignee: Adobe Inc.Inventors: Ayush Chauhan, Vineet Malik, Sourav Suman, Siddharth Jain, Gaurav Sinha, Aayush Makharia
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Publication number: 20240184722Abstract: Implementations described herein relate to a memory device that enables communication between multiple connected host devices. In some implementations, a memory device may receive, from a first host device in communication with the memory device, a send communication command instructing the memory device to transmit data from the first host device to at least a second host device in communication with the memory device. The memory device may receive, from the second host device, a receive communication command instructing the memory device to transmit data to the second host device from at least the first host device. The memory device may transmit a message from the first host device to the second host device based on the send communication command and the receive communication command.Type: ApplicationFiled: November 28, 2023Publication date: June 6, 2024Inventors: Gaurav SINHA, Marco REDAELLI
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Publication number: 20240134519Abstract: Implementations described herein relate to a cluster namespace for a memory device. In some implementations, a memory device may receive a cluster namespace instruction, from a host device, that instructs the memory device to create a cluster namespace using memory resources of the memory device that are spread across a plurality of namespaces of the memory device. The memory device may identify namespace storage information that indicates memory resources associated with a plurality of namespaces of the memory device. The memory device may create the cluster namespace based on creating a plurality of extents that respectively map sets of logical block address ranges from the plurality of namespaces to the cluster namespace.Type: ApplicationFiled: October 19, 2022Publication date: April 25, 2024Inventors: Gaurav SINHA, Marco REDAELLI
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Patent number: 11954309Abstract: In implementations of systems for predicting a terminal event, a computing device implements a termination system to receive input data defining a period of time and a maximum event threshold. This system uses a classification model to generate event scores for a plurality of entity devices. Each of the event scores indicates a probability of an event occurrence for a corresponding entity device within a period of time. The plurality of entity devices are segmented into a first segment and a second segment based on an event score threshold. Entity devices included in the first segment have event scores greater than the event score threshold and entity devices included in the second segment have event scores below the event score threshold. The termination system generates an indication of a probability that a number of event occurrences for the entity devices included in the second segment exceeds the maximum even threshold within the period of time.Type: GrantFiled: May 4, 2020Date of Patent: April 9, 2024Assignee: Adobe Inc.Inventors: Amit Doda, Gaurav Sinha, Kai Yeung Lau, Akangsha Sunil Bedmutha, Shiv Kumar Saini, Ritwik Sinha, Vaidyanathan Venkatraman, Niranjan Shivanand Kumbi, Omar Rahman, Atanu R. Sinha