Abstract: A machine implemented method and a system for simulating an electronic design is provided. The method includes determining a clock period based on a first clock having a first clock period and a second clock having a second clock period used for digital applications of an electronic system. The clock period is a repeating decimal or a value that exceeds a resolution of a simulator. The method further includes using the first clock with the first clock period for simulating the electronic system; determining a third clock for a third clock period and a fourth clock for a fourth clock period such that the third clock and the fourth clock when used in simulation provide an average that is substantially similar to the second clock having the second clock period; and using the third clock and the fourth clock, instead of the second clock for simulating the electronic system.

Abstract: Method and system for application specific integrated circuit (ASIC) simulation, wherein the ASIC includes plural logical elements is provided. The method includes, monitoring transitions at an output of a logic element of the ASIC; checking if the transition is to an unknown value (X); verifying if the unknown value is based on a design error; forcing the output of the logic element to a known value if the unknown is an unwanted condition; propagating the known value to logic elements in the ASIC; and releasing the known value after a next command.

Abstract: A system and method to test a host bus adapter's (“HBAs”) ability to handle stream of invalid characters is provided. A data presenter module presents data to a HBA without being aware of a data format. A data producer module that is aware of the data format and schedules special characters so that the HBA can perform alignment operations. A bit offset change module changes a bit offset that is used by the data presenter module and causes to send random serial data to the HBA, which results in loss of alignment in the HBA and causes the HBA to decode invalid characters.