Patents by Inventor Geirr I. Leistad

Geirr I. Leistad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8453221
    Abstract: In a method for improving client's login and sign-on security in accessing services offered by service providers over shared network resources such as Internet and particularly working within the framework of the www, a password is created for the client at a first attempt to access the service provider. The client's password is generated either at an authentication authority in trust relationship with the service provider and transmitted to the client, or the client is allowed to create his or her password on the basis of random character sequences transmitted from the authentication authority. For subsequent access to the service provider the authentication authority presents a client for characters in ordered sequences or in a diagram containing in an appropriate order a single occurrence of each password character.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: May 28, 2013
    Assignee: Microsoft International Holdings B.V.
    Inventors: Stein H. Danielsen, Geirr I. Leistad
  • Patent number: 8184467
    Abstract: In a non-volatile electric memory system a memory unit and a read/write unit are provided as physically separate units. The memory unit is based on a memory material that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrodes and/or contacts are either provided in the memory unit or in the read/write unit and contacts are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected. The memory material of the memory unit can be polarized into two discernible polarization states.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: May 22, 2012
    Assignee: Thin Film Electronics ASA
    Inventors: Per Bröms, Christer Karlsson, Geirr I. Leistad, Per Hamberg, Staffan Björklid, Johan Carlsson, Göran Gustafsson, Hans Gude Gudesen
  • Patent number: 7764529
    Abstract: In a non-volatile electric memory system a card-like memory unit (10) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. The read/write unit (10) comprises contact means (9) provided in a determined geometrical pattern enabling a definition of memory cells in memory unit (10) in an initial write operation, the memory cells being located in a geometrical pattern corresponding to that of the contact means (9). Establishing a physical contact between the memory unit (10) and the read/write unit (11) closes an electrical circuit over an addressed memory cell such that read, write or erase operations can be effected.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: July 27, 2010
    Assignee: Thin Film Electronics ASA
    Inventors: Geirr I. Leistad, Per Broms, Christer Karlsson
  • Publication number: 20090285981
    Abstract: In a method in the fabrication of a ferroelectric memory device comprising a memory layer sandwiched between first and second electrode sets, the memory layer as well as both electrode sets are each realized in the memory device by a suitable printing process.
    Type: Application
    Filed: June 8, 2006
    Publication date: November 19, 2009
    Inventors: Peter Dyreklev, Geirr I. Leistad, Göran Gustafsson
  • Publication number: 20090165104
    Abstract: In a method for improving client's login and sign-on security in accessing services offered by service providers over shared network resources such as Internet and particularly working within the framework of the www, a password is created for the client at a first attempt to access the service provider. The client's password is generated either at an authentication authority in trust relationship with the service provider and transmitted to the client, or the client is allowed to create his or her password on the basis of random character sequences transmitted from the authentication authority. For subsequent access to the service provider the authentication authority presents a client for characters in ordered sequences or in a diagram containing in an appropriate order a single occurrence of each password character.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 25, 2009
    Inventors: Stein H. DANIELSEN, Geirr I. Leistad
  • Publication number: 20090026513
    Abstract: In a method for forming ferroelectric thin films of vinylidene fluoride oligomer or vinylidene fluoride co-oligomer, oligomer material is evaporated in vacuum chamber and deposited as a thin film on a substrate which is cooled to a temperature in a range determined by process parameters and physical properties of the deposited VDF oligomer or co-oligomer thin film. In an application of the method of the invention for fabricating ferroelectric memory cells or ferroelectric memory devices, a ferroelectric memory material is provided in the form of a thin film of VDF oligomer or VDF co-oligomer located between electrode structures. A ferroelectric memory cell or ferroelectric memory device fabricated in this manner has the memory material in the form of a thin film of VDF oligomer or VDF co-oligomer provided on at least one of first and second electrode structures, such that the thin film is provided on at least one of the electrode structures or between first and second electrode structures.
    Type: Application
    Filed: May 2, 2006
    Publication date: January 29, 2009
    Applicant: Thin Film Electronics ASA
    Inventors: Nicklas Johansson, Haisheng Xu, Geirr I. Leistad
  • Publication number: 20080198644
    Abstract: In a non-volatile electric memory system a memory unit (4) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrode means and/or contact means are either provided in the memory unit or in the read/write unit and contact means are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Contact means in the read/write unit are provided connectable to driving, sensing and control means located in the read/write unit or in an external device connected with the latter. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected.
    Type: Application
    Filed: June 8, 2006
    Publication date: August 21, 2008
    Applicant: Thin Film Electronics ASA
    Inventors: Per Broms, Christer Karlsson, Geirr I. Leistad, Per Hamberg, Staffan Bjorklid, Johan Carlsson, Goran Gustafsson, Hans Gude Gudesen
  • Publication number: 20080198640
    Abstract: In a non-volatile electric memory system a card-like memory unit (10) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. The read/write unit (10) comprises contact means (9) provided in a determined geometrical pattern enabling a definition of memory cells in memory unit (10) in an initial write operation, the memory cells being located in a geometrical pattern corresponding to that of the contact means (9). Establishing a physical contact between the memory unit (10) and the read/write unit (11) closes an electrical circuit over an addressed memory cell such that read, write or erase operations can be effected.
    Type: Application
    Filed: June 8, 2006
    Publication date: August 21, 2008
    Inventors: Geirr I. Leistad, Per Broms, Christer Karlsson
  • Patent number: 7266008
    Abstract: In a method for enhancing the data storage capability of ferroelectric or electret memory cell which has been applied to storage of data and attained an imprint condition, suitable voltage pulses are used for evoking a temporary relaxation of the imprint condition into a volatile polarization state that can be discriminated from the imprinted polarization state in a non-destructive readout operation. Sequences of one or more voltage pulses are used to evoke readout signals respectively indicative of a non-volatile and a volatile polarization state of the memory cell, but without altering said polarization states.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: September 4, 2007
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Geirr I Leistad, Isak Engquist, Göran Gustafsson
  • Patent number: 7248524
    Abstract: In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with controller circuitry and the controller circuitry is connected with an external power supply, which controlled by the former powers the Joule heating means to achieve a selected operating temperature. In a method for operating the heating and temperature control system an ambient or instant temperature of the memory device is determined and compared with the set nominal optimal temperature, and the difference between these temperatures is used in a predefined algorithm for establishing control parameters for the application of power to the Joule heating means to achieve the selected operating temperature in the memory device during an addressing operation thereto.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: July 24, 2007
    Assignee: Thin Film Electronics ASA
    Inventors: Per-Erik Nordal, Geirr I. Leistad, Per Bröms, Hans Gude Gudesen
  • Patent number: 6968388
    Abstract: In methods in the transmission in a data communications network of arbitrarily formatted files between a sender (1) which represents an information provider and one/or more receivers (8) which represent users, a network server (5) is used in the transmission, the transmission itself taking place substantially transparent to both sender (1) and receiver (8). Before the transmission, a file which shall be transmitted is compression-coded, whereafter it is transmitted packet-divided via the server (5) to the receiver (8). In the transmission an already compression-coded file is subjected to a processing specific for one or more users and/or one or more specific application either in the server (5) or in the receiver (8) or both, without any effects on the transmission as such. Software used for the processing can be stored either at the sender (1), server (5) or receiver (8) and possibly downloaded automatically to the processing location.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: November 22, 2005
    Assignee: FileFlow AS
    Inventors: Arild Fuldseth, John Markus Lervik, Rolf Michelsen, Nils-Johan Pedersen, Geirr I. Leistad
  • Patent number: 6952361
    Abstract: In a volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices electrode means are provided so as to form alternating word and bit line means for the memory devices, whereby the number of the electrode means is only one more than the number of memory devices. Moreover adjoining electrode means are arranged in such a manner as to furnish a high proportion of memory cells which can be switched in two or more directions, thus yielding a much higher output when addressed and having an improved signal-to-noise ratio. Each memory device can, due to having a dense electrode arrangement, be provided with an attainable memory cell fill factor approaching unity and half the memory cells can in case be provided switchable in two or more directions, such that the fill factor of these in any case shall approach 0.5.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: October 4, 2005
    Assignee: Thin Film Electronics
    Inventors: Hans Gude Gudesen, Geirr I. Leistad
  • Patent number: 6937499
    Abstract: In a method for determining the logic state of memory cells in a passive matrix-addressable data storage device with word and bit lines, components of current response are detected and correlated with a probing voltage, and a time-dependent potential is applied on selected word and bit lines or groups thereof, said potentials being mutually coordinated in magnitude and time such that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and active bit lines are brought to contain only negligible voltage components that are temporally correlated with the probing voltage. A first apparatus according to the invention for performing the method provides sequential readout of all memory cells on an active word line (AWL) by means of detection circuits (3; 4). An active word line (AWL) is selected by a multiplexer (7), while inactive word lines (IWL) are clamped to ground during readout.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: August 30, 2005
    Inventors: Per-Erik Nordal, Hans Gude Gudesen, Geirr I. Leistad
  • Patent number: 6937500
    Abstract: A matrix-addressable ferroelectric or electret memory device and a method of operating are explained. The method includes applying a first plurality of voltage difference across a first and a second set of electrodes in the memory when data are read, and applying a second plurality of voltage differences when data are refreshed or rewritten. The first and second plurality of voltage differences correspond to sets of potential levels comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is used for determining at least one correction factor for the voltage pulses, whereby the pulse parameter is adjusted accordingly. The memory device comprises means for determining the at least one parameter, a calibration memory connected with means for determining the correction factor, and control circuits for adjusting pulse parameters as applied to read and write operations in the memory device.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: August 30, 2005
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad, Per Bröms, Per Sandström, Mats Johansson
  • Patent number: 6894392
    Abstract: A scaleable integrated data processing device, particularly a microcomputer, comprises a processing unit with one or more processors and a storage unit with one or more memories. The data processing device is provided on a carrier substrate (S) and comprises mutually adjacent substantially parallel layers (P, M, MP) stacked up on each other, the processing unit and the storage unit being provided in one or more such layers and the separate layers formed with a selected number of processors and memories in selected combinations. In each layer are provided horizontal electrical conducting structures which constitute electrical internal connections in the layer and besides each layer comprises further electrical conducting structures which provide electrical connections to other layers and to the exterior of the data processing device. The integrated data processing device has a scaleable architecture, such that it in principle can be configured with an almost unlimited processor and memory capacity.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: May 17, 2005
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad
  • Patent number: 6833593
    Abstract: In an electrode means comprising a first and a second thin-film electrode layers (L1, L2) with electrodes (&egr;) in the form of parallel strip-like electrical conductors in each layer, the electrodes (&egr;) are provided only separated by a thin film (6) of an electrically insulating material with a thickness at most a fraction of the width of the electrodes and at least extending along the side edges thereof and forming an insulating wall (6a) therebetween. The electrode layers (L1, L2) are planarized to obtain an extremely planar surface. In an apparatus comprising one or more electrode means (EM), the electrode layers (L1, L2) of each are mutually oriented with their respective electrodes (1;2) crossing at an angle, preferably orthogonally and with a functional medium (3) provided globally in sandwich therebetween, such that a preferably passive matrix-addressable apparatus is obtained and suited for use as e.g.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: December 21, 2004
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Geirr I. Leistad
  • Publication number: 20040236859
    Abstract: In a method for making more effective the end user's (5) access to and exploitation of information which is offered by a global information provider 5(4), wherein the information consists of dynamic data, quasi-static data, static data or a mixture thereof, including static databases, films, music, text etc. which for the end user's utilization in principle only needs to be transmitted once from information provider (4) to end user (5), the information which is offered on data files is classified with a unique classification key for each data file and priority protocols generated for transmission of data files on basis of a priority matrix which comprises elements formed by criteria for a transmission, said elements stating combinations of these criteria.
    Type: Application
    Filed: March 25, 2004
    Publication date: November 25, 2004
    Inventors: Geirr I. Leistad, Hans Gude Dudesen
  • Patent number: 6787825
    Abstract: A data storage/processing apparatus includes ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules provided as a single main layer or multiple main layers on top of a substrate. Transistors and/or diodes operate the apparatus. In one set of embodiments, at least some of the transistors and/or diodes are provided on or in the substrate. In another set of embodiments, at least some of the layers on the top of the substrate include low-temperature compatible organic materials and/or low temperature compatible processes inorganic films, and the transistors and/or diodes need not be disposed on or in the substrate. In a related fabricating method, the memory and/or processing modules are provided on the substrate by depositing the layers in successive steps under thermal conditions that avoid subjecting an already-deposited, processed underlying layers to static or dynamic temperatures exceeding given stability limits, particularly with regard to organic materials.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: September 7, 2004
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad, Johan Carlsson, Göran Gustafsson, Michael O Thompson
  • Patent number: 6776806
    Abstract: A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: August 17, 2004
    Assignee: Thin Film Electronics ASA
    Inventors: Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad
  • Patent number: 6765617
    Abstract: An optoelectronic camera comprises an objective system formed by a number of optical active structures (L), particularly refractive structures in the form of microlenses or lenslets provided in an array. A detector device (D) is assigned to the lens array and comprises detectors (Dn) formed by sensor elements (E) which define pixels in the optical image. Each detector (Dn) defines a sample of the optical image and optimally all samples are used to generate a digital image. The optoelectronic camera may be realized as a color image camera, particularly for recording images in an RGB system. In a method for digital electronic formatting of an image recorded with the optoelectronic camera, zoom and pan functions are implemented in the camera.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: July 20, 2004
    Inventors: Reidar E. Tangen, Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad