Abstract: A digital processing system P, configured as a regular tree with n+1 levels S0, S1, S2 . . . Sn and degree k, provided in the form of a circuit Pn on the level Sn and forms the root node of the tree, an underlying level Sn−q, q=1,2, . . . n−1, in the circuit P provided nested in the Kq−1 circuits Pn−q+1 on the overlying level Sn−q+1, each circuit Pn−q+1 on this level including k circuits Pn−q. A q=n defined zeroth level in the circuit Pn includes from Kn−1+1 to Kn circuits P0 which form kernel processors in the processing device P and on the level S0 and constitute the leaf nodes of the tree, the kernel processor P0 being provided nested in each of the circuits p1 on the level S1. Each of the circuits P1, P2, . . . Pn, includes a logic unit E which generally is connected with circuits P0, P1, . . . Pn−1. Each of the circuits P0, P1, . . . Pn has additionally identical interfaces I, such that IP0−IP1− . . .

Abstract: In a matrix-addressable optoelectronic apparatus which includes a functional medium in the form of an optoelectronically active material provided in a global layer in sandwich between a first and second electrode with parallel strip-like electrodes wherein the electrodes of the second electrode are oriented at an angle to the electrodes of the first electrode, functional elements are formed in the active material where respective electrodes overlap and correspond to optically active pixels in a display device or pixels in an optical detector, depending upon the active material used. In each of the first and second electrode, the electrodes are provided in a dense parallel configuration and mutually insulated by a thin film with a thickness that is only a fraction of the width of the electrodes.

Abstract: In a volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices (M) electrode means (E) are provided so as to form alternating word and bit line means (WL;BL) for the memory devices, whereby the number of the electrode means is only one more than the number of memory devices. Moreover adjoining electrode means (Ek, Ek+1) are arranged in such a manner as to furnish a high proportion of memory cells (6) which can be switched in two or more directions, thus yielding a much higher output when addressed and having an improved signal-to-noise ratio. Each memory device (M) can, due to having a dense electrode arrangement, be provided with an attainable memory cell fill factor approaching unity and half the memory cells can in case be provided switchable in two or more directions, such that the fill factor of these in any case shall approach 0.5.

Abstract: In a matrix-addressable optoelectronic apparatus comprising a functional medium in the form of an optoelectronically active material (3) provided in a global layer in sandwich between a first and second electrode means (EM1,EM2) with parallel strip-like electrodes (1;2) wherein the electrodes (2) of the second electrode means (EM2) are oriented at an angle to the electrodes (1) of the first electrode means (EM2), functional elements (5) are formed in the active material where respective electrodes (1,2) overlap and correspond to optically active pixels (5) in a display device or pixels (5) in an optical detector, depending upon the active material (3) used. In each of the electrode means (EM1;EM2) the electrodes (1;2) are provided in a dense parallel configuration and mutually insulated by a thin film (6) with a thickness that is only a fraction of the width of the electrodes.

Abstract: In an electrode means comprising a first and a second thin-film electrode layers (L1,L2) with electrodes (∈) in the form of parallel strip-like electrical conductors in each layer, the electrodes (∈) are provided only separated by a thin film (6) of an electrically insulating material with a thickness at most a fraction of the width of the electrodes and at least extending along the side edges thereof and forming an insulating wall (6a) therebetween. The electrode layers (L1,L2) are planarized to obtain an extremely planar surface. In an apparatus comprising one or more electrode means (EM), the electrode layers (L1,L2) of each are mutually oriented with their respective electrodes (1;2) crossing at an angle, preferably orthogonally and with a functional medium (3) provided globally in sandwich therebetween, such that a preferably passive matrix-addressable apparatus is obtained and suited for use as e.g.

Abstract: A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions.

Abstract: In a scalable data processing apparatus, particularly a data storage apparatus, one or more thin-film devices which form a substantially planar layer comprise a plurality of sublayers of thin film. Two or more thin-film devices are provided as an integrated stack of the substantially planar layers which form the thin-film devices, such that the apparatus thereby forms a stacked configuration. Each thin-film device comprises one or more memory areas which form matrix addressable memories and additionally circuit areas which form electronic thin-film circuitry for controlling, driving and addressing memory cells in one or more memories. Each memory device has an interface to every other thin-film device in the apparatus, said interfaces being realized with communication and signal lines as well as supporting circuitry for processing extending vertically through dedicated interface areas in the thin-film device.

Abstract: A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions. A method for global erasing is also disclosed, wherein an electric field is applied to the matrix until the materials in the matrix, in their entirety, arrive in a non-conducting state in response to the field.

Abstract: Electrically conducting and/or semiconducting structures are generated in three dimensions in a composite matrix including two or more materials provided in spatially separate and homogenous material structures. Materials undergo specific physical and/or chemical changes causing transition from electrically non-conducing to electrically conducting and semiconducting state. The material structures are radiated with a given intensity or frequency characteristic adapted to the specific response of the material. Spatially modulating the radiation according to a protocol representing a pattern of electrically conducing and semiconducting structures in the relevant material structures generates the two dimensional electrically conducting and semiconducting structures in the material structure. The composite matrix is provided with electrically conducting and semiconducting structures in three dimensions. Spectral ranges of the radiation include gamma, x-ray, ultraviolet, visible light, inferred, and microwave.

Abstract: A read-only memory is made electrically addressable over a passive conductor matrix, wherein the volume between intersection of two conductors (2; 4) in the matrix defines a memory cell (5). Data are stored as impedance values in the memory cells. The memory cells (5) comprise either an isolating material (6) which provides high impedance or one or more inorganic or organic semiconductors (9), preferably with an anisotropic conducting property. The semiconductor material (9) forms a diode junction at the interface to a metallic conductor (2; 4) in the matrix. By suitable arrangement of respectively the isolating material (6) and semiconductor material (9) in the memory cells these may be given a determined impedance value which may be read electrically and corresponds to logical values in a binary or multi-valued code. One or more read-only memories (ROM) may be provided on a semiconductor substrate (1) which also comprises driver and control circuits (13), to accomplish a read-only memory device.

Abstract: A read-only memory is made electrically addressable over a passive conductor matrix, wherein at least a portion of the volume between intersection of two conductors (2;4) in the matrix defines a memory cell (5) in the read-only memory. Data are stored as impedance values in the memory cells. The memory cells (5) comprise either an isolating material (6) which provides high impedance or one or more inorganic or organic semiconductors (9), preferably with an anisotropic conducting property. The semiconductor material (9) forms a diode junction at the interface to a metallic conductor (2;4) in the matrix. By suitable arrangement of respectively the isolating material (6) and semiconductor material (9) in the memory cells these may be given a determined impedance value which may be read electrically and corresponds to logical values in a binary or multi-valued code.

Abstract: An authenticated personal signature is stored in the database which can be compared to a newly presented signature for validation. The method for registering, analyzing and validating the hand-written personal signature requires that the signature be written in an x, y plane with a writing instrument which has a multiaxis movement detector at its end. The multiaxis movement detector detects the movement of said writing device as a function of time and with six degrees of freedom. The six degrees of freedom given by a linear movement along an x-axis, a y-axis and a z-axis, respectively, as well as by rotation about said x-axis, said y-axis and said z-axis, respectively. The six degrees of freedom of the writing instrument are recorded in predetermined formats in a database. A newly registered personal signature that is presented for validation is compared with the stored authenticated personal signature in the database.

Abstract: Addressable optical logic elements contain an optical memory substance, wherein, under the influence of an impressed magnetic, electromagnetic or electrical field or supplied energy, the memory substance can transfer from one physical or chemical state to a second physical or chemical state, wherein a physical or chemical state is assigned a specific logic value, and wherein a change in the logic element's physical or chemical state causes a change in the logic value and is implemented by the logic element being accessed and addressed magnetically, electromagnetically, electrically or optically for writing, reading, storing, erasing and switching of an assigned logic value.