Abstract: According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.

Abstract: According to one embodiment, an information processing apparatus comprises a plurality of temperature transmission sections provided in each of first and second semiconductor circuits, and configure to transmit first measured temperature of one of the first and second semiconductor circuits to the other of first and second semiconductor circuits when the first measured temperature is higher than a threshold temperature, and a plurality of operation speed varying sections provided in each of the first and second semiconductor circuits configure to reduce operation speed of the processor circuit possessed by the other of first and second semiconductor circuits, when the received first measured temperature is higher than the second measured temperature of the other of the first and second semiconductor circuits.

Abstract: According to one embodiment, an information processing apparatus includes a first processor which has a first instruction set, a second processor which has a second instruction set, a storage unit which stores a program including a first program module which is described by using the second instruction set and causes the second processor to execute a first process including the arithmetic process, and a second program module which is described by using the first instruction set and causes the first processor to execute a process which is the same as the first process, and a control unit which switches a mode for executing the program between a first mode in which the first program module is assigned to the second processor and a second mode in which the second program module is assigned to the first processor.

Abstract: There is provided a network controller setting method applied to an information processing apparatus with a plurality of network controllers. The method includes displaying a screen used to specify use/nonuse of each of the plurality of network controllers, and setting at least one of the plurality of network controllers, to which the use is not specified on the screen, in a disabled state. With this method, the unused network controllers can be brought reliably into the disabled state without letting the use have a sense of troublesomeness or imposing any burden on the user in setting a plurality of network controllers.

Abstract: There is provided a network controller setting method applied to an information processing apparatus with a plurality of network controllers. The method includes displaying a screen used to specify use/nonuse of each of the plurality of network controllers, and setting at least one of the plurality of network controllers, to which the use is not specified on the screen, in a disabled state. With this method, the unused network controllers can be brought reliably into the disabled state without letting the use have a sense of troublesomeness or imposing any burden on the user in setting a plurality of network controllers.