Abstract: A display device includes: a display unit including pixels; a shift register connected to scan signal lines and outputting a pulse signal sequentially, the shift register being divided into shift register segments; a driver generating a clock signal to be supplied to each segment, and a video signal to be input to each pixel; and a controller controlling the driver for generating the clock signal and the video signal, the controller monitoring output of each segment and detecting a malfunction of any of the segments. A shift register unit of a first stage of each segment outputs the pulse signal at a prescribed timing after receiving a start signal. The unit of a stage differing from the first stage outputs the pulse signal at a prescribed timing after receiving a carry signal based on the pulse signal from the unit of a preceding stage.

Abstract: A simulation method includes a process of calculating a transient charge density qT of trapped charges after applying a voltage between a gate electrode and a semiconductor layer of a transistor, the charge density qT being calculated with a time variance of the charge density qT being expressed by a function obtained by superimposing multiple exponential functions having mutually different time constants.

Abstract: A display device includes a pixel circuit on a substrate, a data line configured to transmit a data signal for the pixel circuit on the substrate, and a monitoring circuit. The pixel circuit includes a driving transistor configured to control an amount of electric current supplied to a light-emitting element, and a first switching transistor disposed between the light-emitting element and the driving transistor. The first switching transistor switches between supplying and not supplying the light-emitting element with electric current from the driving transistor. The monitoring circuit monitors a signal at a monitoring point located between the driving transistor and the first switching transistor in the pixel circuit.

Abstract: A pixel circuit for controlling driving current for a light-emitting element is disclosed. The pixel circuit includes a driving transistor configured to supply driving current to the light-emitting element, a first switching transistor configured to transmit a data signal corresponding to the driving current, a storage capacitor configured to receive the signal from the first switching transistor and store a voltage to be applied to a gate of the driving transistor, a second switching transistor configured to correct the voltage to be stored to the storage capacitor, and a first capacitor including an electrode connected with a drain of the driving transistor and an electrode to be supplied with a predetermined potential.

Abstract: A display device includes a first polyimide layer, a first silicon oxide layer located above and in direct contact with the first polyimide layer, an amorphous silicon layer located above and in direct contact with the first silicon oxide layer, a second polyimide layer located above and in direct contact with the amorphous silicon layer, a plurality of light-emitting elements located above the second polyimide layer, a transistor array located above the second polyimide layer, the transistor array being configured to control light emission of the plurality of light-emitting elements, a transparent conductive layer located between the transistor array and the second polyimide layer, and a second silicon oxide layer located between and in direct contact with the transparent conductive layer and the second polyimide layer.

Abstract: A display device includes a pixel circuit on a substrate, a data line on the substrate, the data line being configured to transmit a data signal for the pixel circuit, a monitoring line on the substrate, the monitoring line being different from the data line, and a monitoring circuit. The monitoring circuit is configured to monitor a signal at a monitoring point on a path of the data signal with the monitoring line, and supply a correction signal in place of the data signal to the pixel circuit via the monitoring line and the monitoring point in response to detection of transmission failure of the data signal.

Abstract: A display device includes a pixel circuit on a substrate, a data line on the substrate, the data line being configured to transmit a data signal for the pixel circuit, a monitoring line on the substate, the monitoring line being different from the data line, and a monitoring circuit. The monitoring circuit is configured to monitor a signal at a monitoring point on a path of the data signal with the monitoring line, and supply a correction signal in place of the data signal to the pixel circuit via the monitoring line and the monitoring point in response to detection of transmission failure of the data signal.

Abstract: A display device includes: a display unit including pixels; a shift register connected to scan signal lines and outputting a pulse signal sequentially, the shift register being divided into shift register segments; a driver generating a clock signal to be supplied to each segment, and a video signal to be input to each pixel; and a controller controlling the driver for generating the clock signal and the video signal, the controller monitoring output of each segment and detecting a malfunction of any of the segments. A shift register unit of a first stage of each segment outputs the pulse signal at a prescribed timing after receiving a start signal. The unit of a stage differing from the first stage outputs the pulse signal at a prescribed timing after receiving a carry signal based on the pulse signal from the unit of a preceding stage.

Abstract: A sensor device is disclosed. The sensor device includes a monitor thin film transistor, a reference thin film transistor, and a control unit. The control unit is configured to determine a value measured from a sample based on a differential degree between output current of the reference thin film transistor and output current of the monitor thin film transistor.

Abstract: A display apparatus includes an image display region having pixels sectioned by scanning signal lines and video signal lines, scanning connecting lines, thin film transistors, selection signal lines connected to gate electrodes of the thin film transistors, plural ones of the thin film transistors connected to different ones of the scanning connecting lines being connected to one of the selection signal lines; and a scanning signal drive circuit. The scanning signal drive circuit performs a normal scanning mode in which pulse signals are supplied in turn to plural ones of the scanning connecting lines connected to the one of the selection signal lines, and in the normal scanning mode, a fall timing of the gate-on voltage differs from a fall timing of a last one of the pulse signals supplied to the plural ones of the scanning connecting lines during the selection period.

Abstract: Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.

Abstract: Provided is a liquid crystal display device, including: an array substrate; a plurality of pixels sectioned by video signal lines and scanning signal lines formed on the array substrate; a TFT arranged for each of the plurality of pixels; and a pixel electrode arranged inside each of the plurality of pixels. The TFT includes a channel semiconductor layer and the pixel electrode that are formed of a seamless layer made of an oxide semiconductor. The pixel electrode has an electrical conductivity larger than an electrical conductivity of the channel semiconductor layer under a state in which a gate voltage is not applied.

Abstract: A display device comprises: data lines extending in a first direction; gate lines extending in a second direction, and being divided into groups each of which has the gate lines adjacent in the first direction; selection signal supplying wirings each of which is provided in each group, and connected to each control electrode of the selector transistors corresponding to the group; gate voltage supplying wirings connected to the other conductive electrode of each of the selector transistors corresponding to the group; and wherein a gate driver supplies a second gate voltage having a voltage level lower than that of a first gate voltage to at least one of the gate voltage supplying wirings in each of the groups before supplying the first gate voltage in order to turn on a pixel transistor disposed in an intersection portion of the data line and the gate line.

Abstract: Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.

Abstract: Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.

Abstract: A display apparatus includes an image display region having pixels sectioned by scanning signal lines and video signal lines, scanning connecting lines, thin film transistors, selection signal lines connected to gate electrodes of the thin film transistors, plural ones of the thin film transistors connected to different ones of the scanning connecting lines being connected to one of the selection signal lines; and a scanning signal drive circuit. The scanning signal drive circuit performs a normal scanning mode in which pulse signals are supplied in turn to plural ones of the scanning connecting lines connected to the one of the selection signal lines, and in the normal scanning mode, a fall timing of the gate-on voltage differs from a fall timing of a last one of the pulse signals supplied to the plural ones of the scanning connecting lines during the selection period.

Abstract: A display apparatus includes an image display region having pixels sectioned by scanning signal lines and video signal lines, scanning connecting lines, thin film transistors, selection signal lines connected to gate electrodes of the thin film transistors, plural ones of the thin film transistors connected to different ones of the scanning connecting lines being connected to one of the selection signal lines; and a scanning signal drive circuit. The scanning signal drive circuit performs a normal scanning mode in which pulse signals are supplied in turn to plural ones of the scanning connecting lines connected to the one of the selection signal lines, and in the normal scanning mode, a fall timing of the gate-on voltage differs from a fall timing of a last one of the pulse signals supplied to the plural ones of the scanning connecting lines during the selection period.

Abstract: A display device includes an image display area that includes pixels sectioned by scanning signal lines and video signal lines, first scanning connection lines connected to scanning signal lines, first thin film transistors, first selection signal lines, second thin film transistors, second selection signal lines, and a scanning signal drive circuit connected to the first scanning connection lines, the first selection signal lines, and the second selection signal lines, wherein the scanning signal drive circuit sequentially supplies a pulse signal to the first scanning connection lines in a selection period in which a gate-on voltage is applied to the one of the first selection signal lines, and the scanning signal drive circuit applies a gate-off voltage to the one of the second selection signal lines corresponding to the one of the first selection signal lines to which the gate-on voltage is applied.

Abstract: Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.

Abstract: Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.