Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: A method of using a phase lock loop to receive an oscillating input signal and produce an output signal, the phase lock loop comprising a plurality of flip-flops which are chained together, the plurality of flip-flops including a first flip-flop having a first output, including a second flip-flop having an input coupled to the first output and having a second output, and including a third flip-flop having an input coupled to the second output, the phase lock loop further comprising a control node, the method including using the flip-flops to determine time spacing between transitions to perform a frequency comparison of the output signal relative to the input signal; extracting a clock from an input digital signal; and performing phase control and adjusting the voltage on the control node of the voltage controlled oscillator.

Abstract: The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes providing a data signal having a first portion and a second portion, generating a timing signal, first adjusting the timing signal during the first portion of the data signal, accumulating a history value during the first portion of the data signal, and second adjusting the timing signal during a second portion of the data signal using the history.

Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: An amplifier powered by a selectively engageable voltage source and a method for operating the amplifier. The amplifier includes first and second electrodes for receiving an input signal to be amplified. The first and second electrodes are adapted to be respectively connected to coupling capacitors. The amplifier also includes a differential amplifier having inputs respectively connected to the first and second electrodes, and having an output. The amplifier additionally includes selectively engageable resistances coupled between the voltage source and respective inputs of the differential amplifier and defining, with the coupling capacitors, the high pass characteristics of the circuit. The amplifier further includes second selectively engageable resistances coupled between the voltage source and respective inputs of the differential amplifier.

Abstract: The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes providing a data signal having a first portion and a second portion, generating a timing signal, first adjusting the timing signal during the first portion of the data signal, accumulating a history value during the first portion of the data signal, and second adjusting the timing signal during a second portion of the data signal using the history.

Abstract: A stage for a ring oscillator, the stage including a first p-channel transistor having a gate defining a control node, having a source adapted to be coupled to a supply voltage, and having a drain; a second p-channel transistor having a gate coupled to the control node, having a source coupled to the supply voltage, and having a drain; a first n-channel transistor having a gate defining a first input, having a drain coupled to the drain of the first p-channel transistor and defining a first node, and having a source; a second n-channel transistor having a gate defining a second input, having a drain coupled to the drain of the second p-channel transistor and defining a second node, and having a source; a current source coupled to the sources of the first and second n-channel transistors directing current from the sources of the first and second n-channel transistors; a first resistor coupled between the supply voltage and the drain of the first n-type transistor; a second resistor coupled between the supply v

Abstract: A frequency doubler includes a first Gilbert cell, a second Gilbert cell coupled to the first Gilbert cell, a frequency generator configured to apply a first sinusoidal wave to the first Gilbert cell, and a phase shifter applying a sinusoidal wave shifted from the first sinusoidal wave to the second Gilbert cell. A method of doubling frequency without using a feedback loop includes providing a first Gilbert cell, providing a second Gilbert cell coupled to the first Gilbert cell, applying a first sinusoidal wave to the first Gilbert cell, and applying a sinusoidal wave shifted from the first sinusoidal wave to the second Gilbert cell.

Abstract: An integrated circuit comprising a receiver, a transmitter, and a frequency lock loop configured to supply clock signals to the receiver and transmitter, the frequency lock loop including a current source having a thermal voltage generator, a current controlled oscillator having a plurality of selectively engageable current mirrors multiplying up the current of the current source, the frequency of the frequency lock loop varying in response to selection of the current mirrors, the current mirrors including transistors operating in a subthreshold mode.

Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.

Abstract: A bit synchronization device for an interrogator in a remote intelligent communication system wherein a programmable divider extracts a bit clock from the bits in a bitstream using a clock rate 64 times the data rate and wherein the divider is responsive to an early/late detector for adding or subtracting a count from the divider counter.

Abstract: A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising:a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.

Abstract: A differentially phase shift keyed demodulator for use in an interrogator of a remote intelligent communication system. The demodulator includes a quadrature combiner delaying one of the quadrature signals and thereafter combining the delayed and undelayed signals along with a FIR matched filter, which filters the combiner output whereby the differentially phase shift keyed data on a sub-carrier can be demodulated using a simple delay and multiplying scheme in response to the filtered output.

Abstract: A remote intelligent communications device includes a primary RF communications port and an alternative modem communications port. The remote intelligent communications device receives configuration data for configuring the alternative modem communications port. The remote intelligent communications device obtains information data concerning a select attribute of an associated object. The information data is stored within internal memory of the remote intelligent communications device. Thereafter, the stored information data is retrieved, per one embodiment via the alternative modem port, from the remote intelligent communications device and analyzed for drawing conclusions regarding the select attribute of the associated object. Preferably, the remote intelligent communications device also includes a navigation (e.g. GPS) receiver that obtains navigation data, which navigation data is also stored within the internal memory of the remote intelligent communications device.

Abstract: One or more interrogating commander stations and an unknown plurality of responding responder stations coordinate use of a common communication medium. Each commander station and each responder station is equipped to broadcast messages and to check for error in received messages. When more than one station attempts to broadcast simultaneously, an erroneous message is received and communication is interrupted. To establish uninterrupted communication, a commander station broadcasts a command causing each responder station of a potentially large first number of responder stations to each select a random number from a known range and retain it as its arbitration number. After receipt of such a command, each addressed responder station transmits a response message containing its arbitration number. Zero, one, or several responses may occur simultaneously.

Abstract: A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit including a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.

Abstract: A protocol is used to coordinate the use of a common communication medium by one or more interrogating commander stations and an unknown plurality of responding responder stations. Each commander station and each responder station is equipped to broadcast messages and to check for error in received messages. When more than one station attempts to broadcast simultaneously, an erroneous message is received and communication is interrupted. To establish uninterrupted communication, a commander station broadcasts a command causing each responder station of a potentially large first number of responder stations to each select a random number from a known range and retain it as its arbitration number. After receipt of such a command, each addressed responder station transmits a response message containing its arbitration number. Zero, one, or several responses may occur simultaneously.

Abstract: One or more interrogating commander stations and an unknown plurality of responding responder stations coordinate use of a common communication medium. Each commander station and each responder station is equipped to broadcast messages and to check for error in received messages. When more than one station attempts to broadcast simultaneously, an erroneous message is received and communication is interrupted. To establish uninterrupted communication, a commander station broadcasts a command causing each responder station of a potentially large first number of responder stations to each select a random number from a known range and retain it as its arbitration number. After receipt of such a command, each addressed responder station transmits a response message containing its arbitration number. Zero, one, or several responses may occur simultaneously.