Abstract: Embodiments of methods and means for calibrating a linearization characteristic within an RF transceiver system are provided. Such embodiments generally include extracting a portion of an output signal and frequency shifting or translating that signal by a predetermined value. The frequency shifted signal is then summed or otherwise introduced into a receiver signal pathway where it is analyzed by digital signal processing or other means to determine if linearization distortion is present. Linearization calibration of a power amplifier, a low-noise amplifier and/or other functionality within the system can then be performed in an automatic, reliable and ongoing manner.

Abstract: An apparatus for transmitter control is disclosed. The apparatus includes an analog circuit designed to operate on at least a portion of a communications signal to be wirelessly transmitted, based at least in part on a control signal. The apparatus includes a lookup table coupled to the analog circuit, with the lookup table designed to output the control signal based at least in part on the communications signal, or one or more measured metrics of the communications signal. Embodiments of the present invention include, but are not limited to, methods encompassing the operations described above, as well as subsystems and systems designed to operate in the above described manner.

Abstract: A multichip transceiver operates as part of a multiple-input multiple-output communication system. First receiver circuitry on a first integrated circuit processes radio-frequency (RF) signals received from a first signal source, and second receiver circuitry on a second integrated circuit processes RF signals received from a second signal source. Clock-signal generating circuitry provides clock signals through phase-matched paths to the first and second receiver circuitry.

Abstract: System and method of calibrating delay mismatch for high-spectral purity applications. For example, a method includes measuring the delay of one delay element at a time in a fixed topology by moving a time reference generated by an auxiliary delay-locked loop. The auxiliary DLL may have a replica structure of the primary DLL being calibrated. The calibration method uses one output clock signal of the primary DLL and measures delay mismatch using a reference phase previously measured using the same topology. The calibration method takes into account all delay mismatches in the topology up to the primary DLL output clock signal, including any delay generated by an associated multiplexer.

Abstract: System and method of calibrating delay mismatch for high-spectral purity applications. For example, a method includes measuring the delay of one delay element at a time in a fixed topology by moving a time reference generated by an auxiliary delay-locked loop. The auxiliary DLL may have a replica structure of the primary DLL being calibrated. The calibration method uses one output clock signal of the primary DLL and measures delay mismatch using a reference phase previously measured using the same topology. The calibration method takes into account all delay mismatches in the topology up to the primary DLL output clock signal, including any delay generated by an associated multiplexer.

Abstract: Embodiments of a millimeter-wave phase-locked loop with an injection-locked frequency divider (ILFD) are generally described herein. Other embodiments may be described and claimed. In some embodiments, the ILFD uses a quarter-wavelength transmission line. A method of calibrating an ILFD is also provided to allow the ILFD to operate at or near the center of its locking range for each of a plurality of VCO oscillating frequency bands.

Abstract: A radio receiver includes a first PLL to provide a first local oscillator signal to convert an RF signal to an IF signal, and a second PLL to provide a second local oscillator signal to convert the IF signal to baseband. The first PLL operates at a higher frequency with optimized performance, but it has limited tuning ability. The second PLL operates at a lower frequency and has more tuning ability to compensate for the first PLL lack of it. The first PLL provides an inter-PLL control signal to the second PLL to influence the frequency at which the second PLL operates.

Abstract: An offset canceling buffer receives a reference voltage, and provides a modified reference voltage to a comparator. The modified reference voltage operates to cancel any comparator offset. The offset canceling buffer includes a digitally controllable current source to steer current in different paths based on comparator offset.

Abstract: Embodiments of methods and means for calibrating a linearization characteristic within an RF transceiver system are provided. Such embodiments generally include extracting a portion of an output signal and frequency shifting or translating that signal by a predetermined value. The frequency shifted signal is then summed or otherwise introduced into a receiver signal pathway where it is analyzed by digital signal processing or other means to determine if linearization distortion is present. Linearization calibration of a power amplifier, a low-noise amplifier and/or other functionality within the system can then be performed in an automatic, reliable and ongoing manner.

Abstract: An offset canceling buffer receives a reference voltage, and provides a modified reference voltage to a comparator. The modified reference voltage operates to cancel any comparator offset. The offset canceling buffer includes a digitally controllable current source to steer current in different paths based on comparator offset.

Abstract: Phase and amplitude offsets of a multicarrier transceiver may be reduced by measuring receiver amplitude and phase mismatches of receiver radio-frequency (RF) circuitry by performing a fast Fourier transform (FFT) on a receiver calibration signal.

Abstract: AM/AM distortion is reduced in an amplifier. A lookup table with amplitude correction data is indexed using information derived from an amplitude of a baseband signal. The amplitude correction data is applied as gain control to a variable gain stage.

Abstract: An apparatus and a system, as well as a method and an article, may include detecting an indication of an amplifier output signal amplitude and responsively adjusting the amplifier input signal phase to reduce a change in the phase of the output signal.

Abstract: Embodiments of a filter with gain are presented herein.

Abstract: An apparatus for transmitter control is disclosed. The apparatus includes an analog circuit designed to operate on at least a portion of a communications signal to be wirelessly transmitted, based at least in part on a control signal. The apparatus includes a lookup table coupled to the analog circuit, with the lookup table designed to output the control signal based at least in part on the communications signal, or one or more measured metrics of the communications signal. Embodiments of the present invention include, but are not limited to, methods encompassing the operations described above, as well as subsystems and systems designed to operate in the above described manner.

Abstract: Embodiments of a filter with gain are presented herein.

Abstract: Briefly, some embodiments of the invention provide devices, systems and methods of crosstalk cancellation. For example, an apparatus may include a first transmission path to carry a first signal with information to be transmitted; a second transmission path to carry a second signal with information to be transmitted; a scaler associated with said first transmission path to scale said first signal into a scaled first signal; and a combiner to combine said scaled first signal and said second signal into a combined second signal on said second transmission path.

Abstract: A multichip transceiver operates as part of a multiple-input multiple-output communication system. First receiver circuitry on a first integrated circuit processes radio-frequency (RF) signals received from a first signal source, and second receiver circuitry on a second integrated circuit processes RF signals received from a second signal source. Clock-signal generating circuitry provides clock signals through phase-matched paths to the first and second receiver circuitry.

Abstract: Phase and amplitude offsets of a multicarrier transceiver may be reduced by measuring receiver amplitude and phase mismatches of receiver radio-frequency (RF) circuitry by performing a fast Fourier transform (FFT) on a receiver calibration signal.