Patents by Inventor Gerben Willem De Jong
Gerben Willem De Jong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8138817Abstract: An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.Type: GrantFiled: October 29, 2008Date of Patent: March 20, 2012Assignee: NXP B.V.Inventors: Johannes Hubertus Antonius Brekelmans, Gerben Willem De Jong, Rachid El Waffaoui, Dennis Jeurissen, Jan Van Sinderen, Simon W K Lee
-
Publication number: 20110095807Abstract: A frequency conversion circuit configured to mix a first input signal (RF+,RF?) at a first frequency with a second input signal (LO+,LO?) at a second frequency to provide an output intermediate frequency signal (IFout), the circuit comprising: first and second mixing modules , each mixing module comprising a voltage to current converter configured to receive the first input signal (RF+,RF?) and connected to a Gilbert mixer configured to receive the second input signal (LO+,LO?); an intermediate frequency output circuit having inputs connected to receive an intermediate frequency current signal (IF+,IF?) from outputs of each of the Gilbert mixers and an output configured to provide the output intermediate frequency voltage signal (IFout), wherein the first and second mixing modules comprise transistors which are complementary to each other.Type: ApplicationFiled: September 23, 2010Publication date: April 28, 2011Applicant: NXP B.V.Inventors: Gerben Willem de JONG, Johannes Hubertus Antonius BREKELMANS
-
Publication number: 20110043267Abstract: The invention concerns in general measurement of the transfer function of linear time invariant systems, more particular the calibration of such systems based on a measured transfer function. According to a first aspect the present invention an arrangement for measuring the transfer function of a linear time-invariant system is disclosed. According to a second aspect of the present invention the arrangement is implemented into a linear time-invariant circuitry having a transfer function representing the amplitude and phase characteristic of the circuitry, where by means of the arrangement for measuring the transfer function the transfer function can be optimized in accordance with certain criteria on-the-fly, i.e. in or before operation of the circuit. Finally, an effective and simple method for measuring of the transfer function of a linear time-invariant system together with the use or application of the method is shown.Type: ApplicationFiled: April 30, 2009Publication date: February 24, 2011Applicant: NXP B.V.Inventors: Dennis Jeurissen, Gerben Willem De Jong, Jan Van Sinderen
-
Patent number: 7583650Abstract: A receiver (10) is arranged to simultaneously receive at least a first (S1) radio frequency signal having a first frequency band (1) and a second radio frequency signal (S3) having a second frequency band (3) that is at least partly overlapping the first frequency band (1). The receiver has frequency down-conversion means (32,33) for frequency down converting the at least first (S1) and second radio frequency signals (S3) to at least a first (S2) and a second (S4) lower frequency signal and multiplexing means (34) for sequentially multiplexing the at least first (S2) and second lower frequency signals (S4) into a frequency multiplexed signal (S5).Type: GrantFiled: May 26, 2004Date of Patent: September 1, 2009Assignee: NXP B.V.Inventors: Manel Collados Asensio, Gerben Willem De Jong
-
Patent number: 7433292Abstract: Optical disk systems comprising photo detectors (1) for detecting optical disks comprising amplifiers and slicers (2-5) and delay-difference detectors (6) for detecting delay differences in sliced amplified detection signals are improved by installing delaylineless delay-difference detectors (6) comprising combinatorial-logic circuits (7,8) like inverters, ORs, NORs, ANDs, NANDs and sequential-logic circuits (11-18) like SetResetFlipFlops. Without the prior art delay lines, said delay-difference detectors (6) are of a lower complexity and low costly and can be well integrated. By introducing a first pair of sequential-logic circuits (11,12,15,16) for detecting delay differences between rising edges and a second pair of sequential-logic circuits (13,14,17,18) for detecting delay differences between falling edges, both kinds of edges are being used and the influence of time-jitter is less compared to the situation where just one kind of edge is used.Type: GrantFiled: July 21, 2003Date of Patent: October 7, 2008Assignee: Koninklijke Philips Electronics N.V.Inventors: Johannes Otto Voorman, Gerben Willem De Jong, Johannes Hubertus Antonius Brekelmans
-
Patent number: 7313060Abstract: An optical disk system includes at least one photo detector connected with a variable gain amplifier, a slicer, and a generator which is in the feedback path between the slicer and amplifier. A differential time delay detector provides the output of the optical disk system. The generator is configured for controlling the amplifier non-linearly so that time constants of the control loop of the amplifier which depend upon the level of the input signals are compensated and the timing behavior of the control loop of the amplifier has a more continuous character. A capacitor forms part of an integrator for making the mean value of the output voltage signal of the slicer equal to zero.Type: GrantFiled: July 21, 2003Date of Patent: December 25, 2007Assignee: Koninklijke Philips Electronics, N.V.Inventors: Johannes Otto Voorman, Gerben Willem De Jong, Johannes Hubertus Antonius Brekelmans
-
Patent number: 7170847Abstract: An electronic circuit is provided which can autonomously handle an input current (Ii) having a relatively wide dynamic range without being overdriven. The electronic circuit comprises an amplifier stage (AMPST) having an input (IP) for receiving the input current (Ii) and an output (OP) for supplying an output current (Io), such that, during operation, the strength of the output current (Io) increases in response to an increasing strength of the input current (Ii) as long as the strength of the input current (Ii) has not exceeded an input reference level. The strength of the output current (Io) is kept approximately constant when the strength of the input current (Ii) has exceeded the input reference level but has not exceeded a further input reference level. The strength of the output current (Io) decreases in response to an increasing strength of the input current (Ii) when the strength of the input current (Ii) has exceeded the further input reference level.Type: GrantFiled: September 19, 2003Date of Patent: January 30, 2007Assignee: Koninklijke Philips Electronics N.V.Inventors: Gerben Willem De Jong, Johannes Hubertus Antonius Brekelmans, Jozef Reinerus Maria Bergervoet
-
Patent number: 7126385Abstract: An improved differential inverter comprising a differential inverter having a differential input for receiving a first input signal and a second input signal, said inverter further comprising a differential control input for receiving a first control signal and a second control signal. The improved differential inverter further comprises a differential output for transmitting a first output signal and a second output signal. The improved differential inverter further comprises a controlled bias generator that generates the second vector of input signals in response to a bias control signal. The control bias signal is generated at an output of a voltage divider coupled to the differential output of the differential inverter said bias control signal being indicative for a DC voltage of the of the differential output.Type: GrantFiled: December 12, 2002Date of Patent: October 24, 2006Assignee: Koninklijke Philips Electronics N.V.Inventors: Johannes Hubertus Antonius Brekelmans, Josephus Arnoldus Henricus Maria Kahlman, Gerben Willem De Jong
-
Patent number: 7038434Abstract: A low dropout voltage regulator comprising a series-regulating element (T1) between an input (I) and an output (O) of the voltage regulator, and a differential input error amplifier (1) having a first output (O1) coupled to a control input of the series-regulating element (T1), characterized in that the error amplifier (1) further comprises a second output (O2) coupled to the output (O) via a high-pass filter (5, C1, R1).Type: GrantFiled: July 21, 2003Date of Patent: May 2, 2006Assignee: Koninklijke Phiips Electronics N.V.Inventors: Johannes Hubertus Antonius Brekelmans, Gerben Willem De Jong
-
Patent number: 6940670Abstract: The invention relates to a method of reading of magnetic information. In an example embodiment, a read head includes a magneto-resistive rod polarized with an electrical signal. The magneto-resistive rod supplies a data signal whose variations are representative of magnetic-field variations to which the read head is exposed. Included in the embodiment, there is a compression of the data signal triggered when a thermal asperity is detected.Type: GrantFiled: December 27, 2000Date of Patent: September 6, 2005Assignee: Koninklijke Philips Electronics N.V.Inventors: Gerben Willem De Jong, Johannes Otto Voorman, Joao Nuno Vila Lobos Ramalho, Giuseppe Grillo, Hugo Veenstra
-
Patent number: 6747330Abstract: A current mirror circuit is described which includes a current input terminal (14A), a current output terminal (14B) and a common terminal (14C). A first controllable semiconductor element (T1) is arranged between the current input terminal (14A) and the common terminal (14C). A second controllable semiconductor element (T2) is arranged between the current output terminal (14B) and the common terminal (14C). The controllable semiconductor elements (T1, T2) have interconnected control electrodes (T1A, T2A) which are also coupled to a bias voltage source (VBIAS), for biasing said control electrodes at a reference voltage. The circuit further includes a transconductance stage (12) with an input (12A) coupled to the current input terminal (14A) and an output (12B) coupled to the common terminal (14C). The control electrodes (T1A, T2A) are coupled to the common terminal (14C) via a third controllable semiconductor element (T3).Type: GrantFiled: April 24, 2002Date of Patent: June 8, 2004Assignee: Koninklijke Philips Electronics N.V.Inventors: Johannes Otto Voorman, Gerben Willem De Jong, Rachid El Waffaoui
-
Publication number: 20020159175Abstract: The invention relates to a method of reading magnetic information by means of a read head including a magneto-resistive rod RMR, which is to be polarized by means of an electrical signal Imr and serves to supply a data signal Vmr whose variations are representative of the magnetic-field variations to which the read head is exposed.Type: ApplicationFiled: August 24, 2001Publication date: October 31, 2002Inventors: Gerben Willem De Jong, Johannes Otto Voorman, Joao Nuno Vila Lobos Ramalho, Giuseppe Grillo, Hugo Veenstra