Patents by Inventor Gerhard Miller

Gerhard Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325996
    Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Publication number: 20180061962
    Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
    Type: Application
    Filed: October 4, 2017
    Publication date: March 1, 2018
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Patent number: 9362349
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Publication number: 20140015007
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 16, 2014
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Publication number: 20140001514
    Abstract: A semiconductor device includes a device region. The device region includes at least one device region section including dopant atoms of a first doping type and with a first doping concentration of at least 1E16 cm?3 and dopant atoms of a second doping type and with a second doping concentration of at least 1E16 cm?3.
    Type: Application
    Filed: July 2, 2012
    Publication date: January 2, 2014
    Applicant: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Patent number: 7233031
    Abstract: A vertical power semiconductor component, e.g. a diode or an IGBT, in which there are formed, on the rear side of a substrate, a rear side emitter or a cathode emitter and, over that, a rear side metal layer that at least partly covers the latter, is defined by the fact that, in the edge region of the component, provision is made of injection attenuation means for reducing the charge carrier injection from the rear side emitter or the cathode emitter into said edge section.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: June 19, 2007
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Holger RĂ¼thing, Gerhard Miller, Hans Joachim Schulze, Josef Georg Bauer, Elmar Falck
  • Patent number: 7023086
    Abstract: The present invention relates to a circuit assembly with at least two semiconductor components, each having terminals, whereby at least one terminal of the first semiconductor component is connected to a terminal of the other semiconductor component in an electrically conductive manner. The circuit assembly damps high-frequency oscillations that occur during switching operations. An eddy-current damping structure is provided above said assembly at a distance from the semiconductor components or said semiconductor components are directly connected to each other by means of a high-resistance wire connection in addition to the existent electroconductive connection.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: April 4, 2006
    Assignee: Infineon Technologies AG
    Inventors: Bernd Gutsmann, Paul-Christian Mourick, Gerhard Miller, Dieter Silber
  • Publication number: 20050054147
    Abstract: The present invention relates to a circuit assembly with at least two semiconductor components, each having terminals, whereby at least one terminal of the first semiconductor component is connected to a terminal of the other semiconductor component in an electrically conductive manner. The circuit assembly damps high-frequency oscillations that occur during switching operations. An eddy-current damping structure is provided above said assembly at a distance from the semiconductor components or said semiconductor components are directly connected to each other by means of a high-resistance wire connection in addition to the existent electroconductive connection.
    Type: Application
    Filed: November 20, 2002
    Publication date: March 10, 2005
    Inventors: Bernd Gustmann, Paul-Christian Mourick, Gerhard Miller, Dieter Silber
  • Publication number: 20050035405
    Abstract: A vertical power semiconductor component, e.g. a diode or an IGBT, in which there are formed, on the rear side (R) of a substrate (S), a rear side emitter (14, 14a) or a cathode emitter (24) and, over that, a rear side metal layer (15; 25) that at least partly covers the latter, is defined by the fact that, in the edge region (11; 21) of the component (1-4), provision is made of injection attenuation means (18; 28; 14a; 15a) for reducing the charge carrier injection from the rear side emitter (14, 14a) or the cathode emitter (24) into said edge section (11; 21).
    Type: Application
    Filed: July 7, 2004
    Publication date: February 17, 2005
    Applicant: Infineon Technologies AG
    Inventors: Anton Mauder, Holger Ruthing, Gerhard Miller, Hans Schulze, Josef Georg Bauer, Elmar Falck
  • Patent number: 6309920
    Abstract: A method for forming a field effect vertical bipolar transistor that includes a semiconductive body that has at its top surface a plurality of emitter zones of one conductivity type, each surrounded by a base zone of the opposite conductivity type, and gate electrodes for creating a channel at the surface through the base zone into the bulk inner portion of the one conduction type and at a bottom surface a collector zone that includes a collector electrode overlying a collector layer of the opposite conduction type overlying a field stop layer heavily doped of the opposite conduction type overlying the inner portion lightly doped of the one conduction type. Each of the collector layer and the field stop layer is less than 2 microns in thickness and the collector layer is used to inject minority carriers into the inner zone when appropriately biased.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: October 30, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thomas Laska, Franz Auerbach, Heinrich Brunner, Alfred Porst, Jenoe Tihanyi, Gerhard Miller
  • Patent number: 5753971
    Abstract: A power semiconductor module including a housing that has a housing wall and a base on which the housing is disposed. A number of semiconductor components are disposed on the base. A terminal element includes a portion contained in the housing wall, at least two terminal pins projecting from the housing wall, and an exposed lower part projecting into the housing from the housing wall. The portion of the terminal element contained in the wall and the lower part of the terminal element have a cross-section that is larger than the sum of the cross-sections of each of the terminal pins. The lower part of the terminal element is electrically connected to at least one of the semiconductor components.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: May 19, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Miller, Mario Feldvoss
  • Patent number: 5726474
    Abstract: A semiconductor body is covered by a polysilicon layer having a gate electrode and a contact surface for fastening a gate lead. An integrated ohmic resistor connects the gate electrode to the contact surface.
    Type: Grant
    Filed: March 19, 1996
    Date of Patent: March 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Miller, Thomas Laska, Alfred Porst
  • Patent number: 4951110
    Abstract: Semiconductor structural elements with four regions of alternating conductivity type have a stored charge characteristic which becomes apparent as so-called "tail" current upon switching off. The tail current can be reduced by means of an anode-side emitter region containing damaged regions generated by laser bombardment which extend through a pn-junction formed between the anode-side emitter region and a central region up into the central region.
    Type: Grant
    Filed: October 31, 1988
    Date of Patent: August 21, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Miller, Jenoe Tihanyi, Peter Wehr
  • Patent number: 4893165
    Abstract: A field effect controllable bipolar transistor or isolated gate bipolar transistor (IGBT) has a drastically reduced inhibit delay charge, given identical on-state behavior, in that the anode zone has a thickness of less that 1 micrometer, it is doped with implanted ions with a dose of about 1.times.10.sup.12 through 1.times.10.sup.15 cm.sup.-2, and in that the life time of the minority charge carriers in the inner zone amounts to at least 1 microsecond.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: January 9, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Miller, Helmut Strack, Jenoe Tihanyi
  • Patent number: 4816984
    Abstract: Inverter circuits are provided with bridge arms which, for example, including series-connected transistors (T1l , T2l ) with one freewheeling diode (D1, D2) each transistor. A critical operating state occurs when the recovery current is switched off by one of the diodes (D1, D2), so that the other transistor (T1l , T2l ) is cut in. The return current, which passes through this diode, can assume such high values, when rapidly cutting in the transistor, that the "dynamic" blocking capability of the diode is exceeded, and the diode is burnt out. The load current and the control current are thus reversed, so that the transistor is switched on more slowly and temporarily takes over part of the voltage which is normally applied to the diode.
    Type: Grant
    Filed: January 25, 1988
    Date of Patent: March 28, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventors: Alfred Porst, Gerhard Miller, Mario Feldvoss