Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

Abstract: The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.

Abstract: A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.

Abstract: A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.

Abstract: The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.

Abstract: A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component.

Abstract: A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source.

Abstract: A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component.

Abstract: A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source.

Abstract: A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

Abstract: An integrated circuit including a precharge circuit for a DC/DC boost converter which includes a reference current circuit with a MOSFET transistor (MP4) that has a gate connected with the gate of the DC/DC boost converter's power MOSFET transistor (MP5) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP5) and at the MOSFET transistor (MP4) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP5) due to precharging load capacitance, in a sense to keep the precharge current through the power MOSFET transistor (MP5) constant.

Abstract: A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

Abstract: An integrated circuit including a precharge circuit for a DC/DC boost converter is disclosed with an inductor (L1), a power MOSFET transistor (MP5) connected in series with the inductor between a supply terminal and a load (Rload, Cload) that has a second end connected to ground. This precharge circuit further includes a reference current circuit with a MOSFET transistor (MP4) that has a gate connected with the gate of the power MOSFET transistor (MP5) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP5) and at the MOSFET transistor (MP4) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP5), in a sense to keep the precharge current through the power MOSFET transistor (MP5) constant.

Abstract: The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The charging voltage of this storage capacitor (C1) is the reference voltage to be generated. The controllable switch (P1) is a MOS field-effect transistor with back gate (24) which, by means of a refresh signal supplied by a control circuit (22), can be put periodically into either a conducting or a non-conducting state. The back gate (24) of the MOS fieldeffect transistor (P1) is connected to an auxiliary storage capacitor (C2) to which the voltage supplied by the reference voltage source (12) can be applied via a further switch, consisting of a MOS field-effect transistor (P2) with back gate (26), and which is also controlled by the refresh signal.

Abstract: The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The charging voltage of this storage capacitor (C1) is the reference voltage to be generated. The controllable switch (P1) is a MOS field-effect transistor with back gate (24) which, by means of a refresh signal supplied by a control circuit (22), can be put periodically into either a conducting or a non-conducting state. The back gate (24) of the MOS fieldeffect transistor (P1) is connected to an auxiliary storage capacitor (C2) to which the voltage supplied by the reference voltage source (12) can be applied via a further switch, consisting of a MOS field-effect transistor (P2) with back gate (26), and which is also controlled by the refresh signal.

Abstract: An anode for electrochemical processes comprises a basis metal and a new electrochemical active substance for the cover layer, which substance is thallium palladate having the formula TlPd.sub.3 O.sub.4.

Abstract: A protective cover layer is provided for the basis metal of an electrolytic anode, particularly for anodes used in the production of chlorine and caustic soda. The cover layer comprises a non-stoichiometric compound having the empirical formula:M.sub.n Pt.sub.3 O.sub.4where M is lithium, sodium, potassium, silver, or copper and n is a number in the range of about 0.4 to 0.6.