Patents by Inventor Gerhard Thiele

Gerhard Thiele has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11218076
    Abstract: A switching converter circuit includes a hysteretic comparator with a reference voltage (VREF) node and a feedback node. The switching converter circuit also includes a switchable error amplifier circuit coupled to the feedback node of the hysteretic comparator. The switchable error amplifier circuit includes an error amplifier that is coupled to the feedback node during a power-save mode and that is decoupled from the feedback node during a deep power-save mode initiated in response to a duration of the power-save mode being greater than a time threshold.
    Type: Grant
    Filed: August 31, 2019
    Date of Patent: January 4, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Antonio Priego, Johann Erich Bayer, Gerhard Thiele
  • Publication number: 20210376731
    Abstract: A circuit includes a first power converter having a first voltage input and a first output. The circuit also includes a second power converter having a second voltage input coupled to the first voltage input, a clock input, and a second output. A phase shifter is coupled between the first output and the clock input of the second power converter.
    Type: Application
    Filed: May 11, 2021
    Publication date: December 2, 2021
    Inventors: Erich-Johann Bayer, Gerhard Thiele, Antonio Priego
  • Patent number: 11101727
    Abstract: A power converter includes a watchdog circuit having an input adapted to be coupled to a pause signal of a switching power supply. The watchdog circuit is configured to provide a start signal at an output thereof based on the pause signal indicating that the power converter has stopped switching for a threshold duration that is less than an audible range. A pulse generator circuit has an input coupled to the output of the watchdog circuit and is configured to generate at least one pulse based on the start signal. A switch circuit has an input terminal adapted to be coupled to an input voltage and at least one other terminal adapted to be coupled to an inductor. The switch circuit is configured to provide negative current from an output of the power converter through the at least one other terminal based on the at least one pulse.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: August 24, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anmol Sharma, Thomas Keller, Gerhard Thiele
  • Publication number: 20210257898
    Abstract: A power converter includes a watchdog circuit having an input adapted to be coupled to a pause signal of a switching power supply. The watchdog circuit is configured to provide a start signal at an output thereof based on the pause signal indicating that the power converter has stopped switching for a threshold duration that is less than an audible range. A pulse generator circuit has an input coupled to the output of the watchdog circuit and is configured to generate at least one pulse based on the start signal. A switch circuit has an input terminal adapted to be coupled to an input voltage and at least one other terminal adapted to be coupled to an inductor. The switch circuit is configured to provide negative current from an output of the power converter through the at least one other terminal based on the at least one pulse.
    Type: Application
    Filed: February 13, 2020
    Publication date: August 19, 2021
    Inventors: ANMOL SHARMA, THOMAS KELLER, GERHARD THIELE
  • Patent number: 10992229
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: April 27, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Gerhard Thiele, Manuel Wiersch, Antonio Priego, Johann Erich Bayer, Stefan Herzer
  • Patent number: 10965216
    Abstract: An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: March 30, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gerhard Thiele, Manuel Wiersch
  • Publication number: 20200127569
    Abstract: A switching converter circuit includes a hysteretic comparator with a reference voltage (VREF) node and a feedback node. The switching converter circuit also includes a switchable error amplifier circuit coupled to the feedback node of the hysteretic comparator. The switchable error amplifier circuit includes an error amplifier that is coupled to the feedback node during a power-save mode and that is decoupled from the feedback node during a deep power-save mode initiated in response to a duration of the power-save mode being greater than a time threshold.
    Type: Application
    Filed: August 31, 2019
    Publication date: April 23, 2020
    Inventors: Antonio PRIEGO, Johann Erich BAYER, Gerhard THIELE
  • Publication number: 20200127570
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 23, 2020
    Inventors: Gerhard THIELE, Manuel WIERSCH, Antonio PRIEGO, Johann Erich BAYER, Stefan HERZER
  • Publication number: 20200106357
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Application
    Filed: October 1, 2019
    Publication date: April 2, 2020
    Inventors: Manuel WIERSCH, Gerhard THIELE, Antonio PRIEGO, Johann Erich BAYER
  • Publication number: 20200106360
    Abstract: A switching converter circuit includes a voltage regulation loop configured to provide an output voltage (VOUT) based on an input voltage (VIN). The switching converter circuit also includes a 100% mode circuitry coupled to the voltage regulation loop, wherein the 100% mode circuitry is configured to apply an offset to VOUT in response to detecting that VIN is approaching VOUT.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 2, 2020
    Inventors: Antonio PRIEGO, Gerhard THIELE, Manuel WIERSCH, Johann Erich BAYER
  • Patent number: 10608538
    Abstract: A device includes a first transistor coupled to a ground node and a current source. The first transistor includes a control terminal coupled to a reference voltage source, where the current source is coupled to an input voltage source. The device includes a second transistor coupled to the input voltage source, where the second transistor includes a control terminal coupled to the first transistor. The device includes a third transistor coupled to the second transistor, where the third transistor includes a control terminal coupled to an output voltage node. The device includes a fourth transistor coupled to the third transistor, where the fourth transistor includes a control terminal coupled to the output voltage node. The device includes a fifth transistor coupled to the fourth transistor and a resistor, where the fifth transistor includes a control terminal coupled to the fourth transistor. The resistor is coupled to the ground node.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: March 31, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Manuel Wiersch, Gerhard Thiele
  • Publication number: 20200099299
    Abstract: An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: Gerhard THIELE, Manuel WIERSCH
  • Patent number: 10298127
    Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: May 21, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gerhard Thiele, Erich Bayer
  • Publication number: 20170229966
    Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.
    Type: Application
    Filed: February 14, 2017
    Publication date: August 10, 2017
    Inventors: Gerhard Thiele, Erich Bayer
  • Patent number: 9577517
    Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: February 21, 2017
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Gerhard Thiele, Erich Bayer
  • Publication number: 20150123638
    Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.
    Type: Application
    Filed: July 2, 2014
    Publication date: May 7, 2015
    Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Gerhard Thiele, Erich Bayer
  • Patent number: 8970199
    Abstract: The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: March 3, 2015
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Kevin Scoones, Gerhard Thiele, Neil Gibson
  • Patent number: 8436601
    Abstract: A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: May 7, 2013
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Gerhard Thiele, Konrad Wagensohner, Josy Bernard
  • Publication number: 20110204860
    Abstract: A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 25, 2011
    Applicant: Texas Instruments Deutschland GmbH
    Inventors: Gerhard Thiele, Konrad Wagensohner, Josy Bernard
  • Publication number: 20100308784
    Abstract: The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 9, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Kevin Scoones, Gerhard Thiele, Neil Gibson