Patents by Inventor Gert Leusink

Gert Leusink has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6992011
    Abstract: A cleaning method is provided using a cleaning gas mixture of hydrogen and inert gas, for example a mixture in which the hydrogen content is between 20 percent and 80 percent by volume, provided to the chamber of a semiconductor wafer processing apparatus and an ICP power source only to generate a high density plasma in the gas mixture without biasing the surface to be cleaned. In examples of the invention, Si and SiO2 contaminants or CFx contaminants are cleaned from a silicon contact prior to subsequent metal deposition. In another example of the invention, silicon residue is cleaned from internal chamber surfaces before oxide etching to recover the baseline oxide etch rate.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: January 31, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Takenao Nemoto, Emmanuel Guidotti, Gert Leusink
  • Publication number: 20050227441
    Abstract: A method for forming a tantalum-containing gate electrode structure by providing a substrate having a high-k dielectric layer thereon in a process chamber and forming a tantalum-containing layer on the high-k dielectric layer in a thermal chemical vapor deposition process by exposing the substrate to a process gas containing TAIMATA (Ta(N(CH3)2)3(NC(C2H5)(CH3)2)) precursor gas. In one embodiment of the invention, the tantalum-containing layer can include a TaSiN layer formed from a process gas containing TAIMATA precursor gas, a silicon containing gas, and optionally a nitrogen-containing gas. In another embodiment of the invention, a TaN layer is formed on the TaSiN layer. The TaN layer can be formed from a process gas containing TAIMATA precursor gas and optionally a nitrogen-containing gas. A computer readable medium executable by a processor to cause a processing system to perform the method and a processing system for forming a tantalum-containing gate electrode structure are also provided.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Inventors: Kazuhito Nakamura, Hideaki Yamasaki, Yumiko Kawano, Gert Leusink, Fenton McFeely, John Yurkas, Vijay Narayanan
  • Publication number: 20050221002
    Abstract: A method for processing a substrate on a ceramic substrate heater in a process chamber. The method includes forming a protective coating on the ceramic substrate heater in the process chamber and processing a substrate on the coated substrate heater. The processing can include providing a substrate to be processed on the coated ceramic substrate heater, performing a process on the substrate by exposing the substrate to a process gas, and removing the processed substrate from the process chamber.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Inventors: Kazuhito Nakamura, Cory Wajda, Enrico Mosca, Yumiko Kawano, Gert Leusink, Fenton McFeely, Sandra Malhotra
  • Publication number: 20050079708
    Abstract: A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process. The TCVD process utilizes high flow rate of a dilute process gas containing a metal-carbonyl precursor to deposit a metal layer. In one embodiment of the invention, the metal-carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12. In another embodiment of the invention, a method is provided for depositing a W layer from a process gas comprising a W(CO)6 precursor at a substrate temperature of about 410° C. and a chamber pressure of about 200 mTorr.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 14, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Masahito Sugiura, Yumiko Kawano, Gert Leusink, Fenton McFeely, Sandra Malhotra
  • Publication number: 20050068519
    Abstract: A method and system are provided for monitoring status of a system component in a process chamber of a batch type processing system. The method includes exposing a system component to light from a light source and monitoring interaction of the light with the system component to determine status of the system component. The method can detect light transmission and/or light reflection from a system component during a process that can include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, and a liner, and can further contain a protective coating.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: David O'Meara, Daniel Burdett, Stephen Cabral, Gert Leusink, John Kostenko, Cory Wajda
  • Publication number: 20050070104
    Abstract: A method and system for monitoring status of a system component during a process. The method includes exposing a system component to a reactant gas during a process, where the reactant gas is capable of etching the system component material to form an erosion product, and monitoring release of the erosion product during the process to determine status of the system component. Processes that can be monitored include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, an injector, a substrate holder, a liner, a pedestal, a cap cover, an electrode, and a heater, any of which can further include a protective coating.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Inventors: David O'Meara, Daniel Burdett, Stephen Cabral, Gert Leusink, John Kostenko, Cory Wajda
  • Publication number: 20050069641
    Abstract: A method for depositing metal layers with good surface morphology using sequential flow deposition includes alternately exposing a substrate in a process chamber to a metal-carbonyl precursor gas and a reducing gas. During exposure with the metal-carbonyl precursor gas, a thin metal layer is deposited on the substrate, and subsequent exposure of the metal layer to the reducing gas aids in the removal of reaction by-products from the metal layer. The metal-carbonyl precursor gas and a reducing gas exposure steps can be repeated until a metal layer with a desired thickness is achieved. The metal-carbonyl precursor can, for example, be selected from W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Tsukasa Matsuda, Taro Ikeda, Tatsuo Hatano, Mitsuhiro Tachibana, Hideaki Yamasaki, Gert Leusink, Fenton McFeely, Sandra Malhotra, Andrew Simon, John Yurkas
  • Publication number: 20050069632
    Abstract: A method is provided for forming a metal layer on a substrate using an intermittent precursor gas flow process. The method includes exposing the substrate to a reducing gas while exposing the substrate to pulses of a metal-carbonyl precursor gas. The process is carried out until a metal layer with desired thickness is formed on the substrate. The metal layer can be formed on a substrate, or alternately, the metal layer can be formed on a metal nucleation layer.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Mitsuhiro Tachibana, Koumei Matsuzava, Yumiko Kawano, Gert Leusink, Fenton McFeely, Sandra Malhotra, Andrew Simon, John Yurkas
  • Publication number: 20050070100
    Abstract: A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process includes introducing a process gas containing a metal carbonyl precursor in a process chamber and depositing a metal layer on a substrate. The TCVD process utilizes a short residence time for the gaseous species in the processing zone above the substrate to form a low-resistivity metal layer. In one embodiment of the invention, the metal carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12 precursors. In another embodiment of the invention, a method is provided for depositing low-resistivity W layers at substrate temperatures below about 500° C., by utilizing a residence time less than about 120 msec.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Masahito Sugiura, Yumiko Kawano, Gert Leusink, Fenton McFeely, Sandra Malhotra
  • Patent number: 6853953
    Abstract: A method for characterizing the performance of an electrostatic chuck prior to installing the chuck in the vacuum chamber of a semiconductor processing system in a production line. One or more characteristics of the electrostatic chuck are measured and compared with the known characteristics of a reference chuck. The comparison indicates the performance of the chuck and projects the performance of the chuck in an actual operating environment. The characteristics that are measured include the chuck impedance, the current-voltage characteristic of the chuck, the local plasma density proximate the support surface of the chuck, and the cooling or heating rate of the chuck.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: February 8, 2005
    Assignee: Tokyo Electron Limited
    Inventors: Jozef Brcka, Bill Jones, Gert Leusink, Jeffrey J. Long, Bill Oliver, Charles Tweed
  • Publication number: 20040137750
    Abstract: A cleaning method is provided using a cleaning gas mixture of hydrogen and inert gas, for example a mixture in which the hydrogen content is between 20 percent and 80 percent by volume, provided to the chamber of a semiconductor wafer processing apparatus and an ICP power source only to generate a high density plasma in the gas mixture without biasing the surface to be cleaned. In examples of the invention, Si and SiO2 contaminants or CFx contaminants are cleaned from a silicon contact prior to subsequent metal deposition. In another example of the invention, silicon residue is cleaned from internal chamber surfaces before oxide etching to recover the baseline oxide etch rate.
    Type: Application
    Filed: January 15, 2003
    Publication date: July 15, 2004
    Applicant: Tokyo Electron Limited
    Inventors: Takenao Nemoto, Emmanuel Guidotti, Gert Leusink
  • Patent number: 6635569
    Abstract: A methodology is described by which a processing chamber used to deposit plasma-enhanced Ti-CVD films may be conditioned and passivated efficiently after either a wet cleaning or in-situ chemical cleaning, or after each successive deposition sequence. The technique allows a CVD process, such as, for example, a Ti-PECVD process, to recover film properties, such as resistivity, uniformity, and deposition rate, in a minimum time and following a minimum number of conditioning wafers, thereby improving the productivity of the system. The technique also maintains the stability of the system during continuous operation. This allows for the processing of thousands of wafers between in-situ cleaning of the chamber.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: October 21, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Michael S. Ameen, Joseph T. Hillman, Gert Leusink, Michael Ward, Tugrul Yasar
  • Publication number: 20030033116
    Abstract: A method for characterizing the performance of an electrostatic chuck prior to installing the chuck in the vacuum chamber of a semiconductor processing system in a production line. One or more characteristics of the electrostatic chuck are measured and compared with the known characteristics of a reference chuck. The comparison indicates the performance of the chuck and projects the performance of the chuck in an actual operating environment. The characteristics that are measured include the chuck impedance, the current-voltage characteristic of the chuck, the local plasma density proximate the support surface of the chuck, and the cooling or heating rate of the chuck.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 13, 2003
    Applicant: Tokyo Electron Limited of TBS Broadcast Center
    Inventors: Jozef Brcka, Bill Jones, Gert Leusink, Jeffrey J. Long, Bill Oliver, Charles Tweed
  • Patent number: 5926737
    Abstract: A method of using titanium chloride to etchback CVD-Ti on a patterned oxide wafer and the product formed by this process. Titanium is deposited onto a wafer composed of a silicon base and a pattern oxide layer which exposes portions of the silicon. The titanium is deposited onto the wafer by CVD-Ti. The titanium is deposited as metallic Ti on the oxide layer and reacts with the silicon substrate to form titanium silicide. The wafer is then exposed to a flow of titanium tetrachloride (TiCl.sub.4) gas. The TiCl.sub.4 etches away the metallic Ti on the oxide layer and does not substantially etch the titanium silicide. Optionally titanium nitride and tungsten may then be deposited on the substrate.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: July 20, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Michael S. Ameen, Gert Leusink, Joseph T. Hillman