Patents by Inventor Geun Cha

Geun Cha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190381187
    Abstract: Disclosed are a ceria nanocomposite for biomedical treatment, including a ceria nanoparticle; and a pharmaceutical composition. The disclosed ceria nanocomposite for biomedical treatment includes a ceria nanoparticle and a surface modification layer arranged on the surface of the ceria nanoparticle, wherein the surface modification layer includes a polyethylene glycol residue, and in the ceria nanoparticle, the content of Ce3+ is greater than the content of Ce4+.
    Type: Application
    Filed: January 11, 2017
    Publication date: December 19, 2019
    Applicant: Cenyx Biotech Inc.
    Inventors: Seung-Hoon Lee, Han-Gil Jeong, Do Yeon Kim, Dong-Wan Kang, Jaeyun Kim, Bong Geun Cha
  • Publication number: 20190326560
    Abstract: A method for manufacturing a display device including forming a lower electrode on a substrate; depositing a first insulation layer thereon; forming a semiconductor layer that overlaps the lower electrode thereon; depositing a second insulation layer thereon; forming a gate electrode and an etching prevention layer that overlap the semiconductor layer thereon; depositing a third insulation layer thereon; forming a first conductor that overlaps the gate electrode thereon; depositing a fourth insulation layer thereon; forming a photosensitive film patterns thereon by depositing a photosensitive film and exposing and developing the photosensitive film such that portions of the photosensitive film are removed in a first area, a second area, and a third area; etching the third insulation layer using the patterns as an etching mask; etching the etching prevention layer by using the patterns as an etching mask; and etching the first insulation layer using the patterns as an etching mask.
    Type: Application
    Filed: November 29, 2018
    Publication date: October 24, 2019
    Inventors: Myoung Geun CHA, Sang Gun CHOI, Joon Woo BAE, Ji Yeong SHIN, Yong Su LEE
  • Patent number: 10453911
    Abstract: A display device includes first semiconductor pattern including a first channel portion, a first electrode connected to a driving voltage line, and a second electrode connected to a light emitting element, a first insulating, a first conductive layer including a first gate electrode, a second insulating layer, a second conductive layer including an initialization power line, a third insulating layer, an upper semiconductor layer including a second semiconductor pattern including a second channel portion, a third electrode, and a fourth electrode connected to the first gate electrode, and a third semiconductor pattern including a third channel portion, a fifth electrode connected to the third electrode, and a sixth electrode connected to the second electrode, a fourth insulating layer, and a third conductive layer including a scan line and a control signal line, wherein the upper semiconductor layer does not overlap the first gate electrode and the initialization power line.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 22, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myoung Geun Cha, Sang Gun Choi, Thanh Tien Nguyen, Kyoung Won Lee, Yong Su Lee, Joo Hye Jung
  • Publication number: 20190312147
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: December 24, 2018
    Publication date: October 10, 2019
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Patent number: 10388794
    Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a plurality of transistors formed on the substrate; and a light-emitting device connected to the plurality of transistors, wherein the transistor includes a gate electrode, the plurality of transistors include a first transistor and a second transistor of which lateral wall slope angles of the gate electrode are different from each other, and the first transistor further includes a doping control member formed on a lateral wall of the gate electrode.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: August 20, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jong Chan Lee, Woong Hee Jeong, Dae Ho Kim, Young Ki Shin, Yoon Ho Khang, Myoung Geun Cha
  • Publication number: 20190240161
    Abstract: Provided are a ceria nanocomposite including a ceria nanoparticle for treating subarachnoid hemorrhage, a method of preparing the same, and a pharmaceutical composition including the ceria nanocomposite. The ceria nanocomposite for treating subarachnoid hemorrhage disclosed herein includes a ceria nanoparticle and a surface modified layer disposed on a surface of the ceria nanoparticle, wherein the surface modified layer includes a polyethylene glycol residue.
    Type: Application
    Filed: October 21, 2016
    Publication date: August 8, 2019
    Applicants: Cenyx Biotech Inc., Seoul National University Hospital, Research & Business Foundation Sungkyunkwan University
    Inventors: Seung-Hoon Lee, Han-Gil Jeong, Do Yeon Kim, Dong-Wan Kang, Jaeyun Kim, Bong Geun Cha
  • Publication number: 20190121899
    Abstract: Disclosed herein are an apparatus and method for managing integrated storage. The apparatus includes a data distribution and storage unit for distributing data in order to store the data in integrated storage, including on-premises storage and cloud storage; a storage management unit for connecting to the integrated storage in order to store the data and providing information about storage tiering pertaining to the data; a data manipulation unit for providing the integrated storage as virtual data storage regardless of a location at which the data is actually stored; and a storage connection unit for providing a user with an interface for the created virtual data storage as a single virtual storage unit, wherein the information about storage tiering varies depending on the performance of storage, the time during which the data is used, and the frequency with which the data is accessed.
    Type: Application
    Filed: September 4, 2018
    Publication date: April 25, 2019
    Inventors: Dae-Won KIM, Sun-Wook KIM, Seong-Woon KIM, Soo-Cheol OH, Jae-Geun CHA, Ji-Hyeok CHOI
  • Publication number: 20190115412
    Abstract: A display device includes first semiconductor pattern including a first channel portion, a first electrode connected to a driving voltage line, and a second electrode connected to a light emitting element, a first insulating, a first conductive layer including a first gate electrode, a second insulating layer, a second conductive layer including an initialization power line, a third insulating layer, an upper semiconductor layer including a second semiconductor pattern including a second channel portion, a third electrode, and a fourth electrode connected to the first gate electrode, and a third semiconductor pattern including a third channel portion, a fifth electrode connected to the third electrode, and a sixth electrode connected to the second electrode, a fourth insulating layer, and a third conductive layer including a scan line and a control signal line, wherein the upper semiconductor layer does not overlap the first gate electrode and the initialization power line.
    Type: Application
    Filed: April 27, 2018
    Publication date: April 18, 2019
    Inventors: Myoung Geun CHA, Sang Gun CHOI, Thanh Tien NGUYEN, Kyoung Won LEE, Yong Su LEE, Joo Hye JUNG
  • Publication number: 20190065061
    Abstract: Disclosed herein are an apparatus and method for providing storage for providing a cloud service. The apparatus includes a data distribution and storage unit for distributing data in order to store the data in integrated storage, including on-premises storage and cloud storage; a backend storage management unit for connecting to the integrated storage in order to store the data and providing information about storage tiering pertaining to the data; a data manipulation unit for providing the integrated storage as virtual data storage regardless of a location at which the data is actually stored; and a storage connection unit for providing a user with an interface for the virtual data storage as a single virtual storage unit.
    Type: Application
    Filed: August 7, 2018
    Publication date: February 28, 2019
    Inventors: Dae-Won KIM, Sun-Wook KIM, Seong-Woon KIM, Soo-Cheol OH, Jae-Geun CHA, Ji-Hyeok CHOI
  • Patent number: 10192992
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Publication number: 20180293090
    Abstract: Disclosed herein are a virtual desktop server for supporting high-quality graphics processing and a method for processing high-quality graphics using the virtual desktop server. The virtual desktop server includes one or more virtual desktops for creating instructions for accelerated graphics processing by running a high-quality graphics application, one or more hardware-based graphics accelerators for creating screen data by executing the instructions for accelerated graphics processing and for storing the created screen data in a frame buffer, and a hypervisor for transmitting the screen data received from the virtual desktop to a client over a network, and the virtual desktop captures the screen data stored in the frame buffer, converts the captured screen data, and delivers the converted screen data to the hypervisor.
    Type: Application
    Filed: March 16, 2018
    Publication date: October 11, 2018
    Inventors: Soo-Cheol OH, Dae-Won KIM, Sun-Wook KIM, Jae-Geun CHA, Ji-Hyeok CHOI, Seong-Woon KIM
  • Publication number: 20180240910
    Abstract: A transistor includes a buffer layer, an active pattern, and a first insulating layer. The buffer layer is doped with an impurity. The active pattern is on the buffer layer and includes a channel area between a source area and a drain area. The first insulating layer is on the active pattern. A gate electrode is on the first insulating layer and overlaps the channel area. A source electrode is insulated from the gate electrode and is electrically coupled with the source area. A drain electrode is insulated from the gate electrode and is electrically coupled with the drain area.
    Type: Application
    Filed: February 21, 2018
    Publication date: August 23, 2018
    Inventors: Yoon Ho KHANG, Doo Na KIM, Myoung Geun CHA
  • Publication number: 20180159090
    Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.
    Type: Application
    Filed: January 10, 2018
    Publication date: June 7, 2018
    Inventors: Myoung Geun Cha, Jin Goo Jung, Yoon Ho Khang, Se Mi Kim
  • Patent number: 9991319
    Abstract: A thin film transistor (TFT), method of manufacturing the TFT and a flat panel display having the TFT are disclosed. In one aspect, the TFT comprises a substrate and an active layer formed over the substrate, wherein the active layer is formed of oxide semiconductor, and wherein the active layer includes two opposing sides. The TFT also comprises source and drain regions formed at the opposing sides of the active layer, a first insulating layer formed over the active layer, a gate electrode formed over the active layer, a second insulating layer formed covering the first insulation layer and the gate electrode, and a first conductive layer formed on the source and drain regions and contacting the second insulating layer.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: June 5, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung-Geun Cha, Sang-Ho Park, Hyun-Jae Na, Yoon-Ho Khang, Dae-Ho Kim
  • Patent number: 9921794
    Abstract: A blind display device includes a plurality of curved display panels, a support, and a plurality of rotators. Each of the curved display panels includes a curved display area between a flat display area and a bezel area. The support guides movement of the curved display panels. The rotators couple corresponding ones of the curved display panels to the support and rotate corresponding ones of the curved display panels.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: March 20, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Chan Lee, So-Young Koo, Myoung-Geun Cha, Yoon-Ho Khang, Myoung-Hwa Kim, Woong-Hee Jeong
  • Publication number: 20180069129
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 8, 2018
    Inventors: YONG SU LEE, YOON HO KHANG, DONG JO KIM, HYUN JAE NA, SANG HO PARK, SE HWAN YU, CHONG SUP CHANG, DAE HO KIM, JAE NEUNG KIM, MYOUNG GEUN CHA, SANG GAB KIM, YU-GWANG JEONG
  • Patent number: 9907759
    Abstract: The present invention provides a method for preparing a film comprising a high amount of a sildenafil free base uniformly dispersed therein and having a suitable thickness and size, as well as flexibility providing good handling stability and being not prone to breaking. The present invention also provides a sildenafil free base-containing film prepared from the method.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 6, 2018
    Assignee: CTC Bio, Inc.
    Inventors: Hong-Ryeol Jeon, Bong-Sang Lee, Su-Jun Park, Bong-Geun Cha, Jun-Ki Kim
  • Patent number: 9899634
    Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: February 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Geun Cha, Jin Goo Jung, Yoon Ho Khang, Se Mi Kim
  • Patent number: 9768309
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: September 19, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Patent number: 9620609
    Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: April 11, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Jae Na, Yoon Ho Khang, Sang Ho Park, Dong Hwan Shim, Se Hwan Yu, Yong Su Lee, Myoung Geun Cha