Abstract: A thin film transistor (TFT), method of manufacturing the TFT and a flat panel display having the TFT are disclosed. In one aspect, the TFT comprises a substrate and an active layer formed over the substrate, wherein the active layer is formed of oxide semiconductor, and wherein the active layer includes two opposing sides. The TFT also comprises source and drain regions formed at the opposing sides of the active layer, a first insulating layer formed over the active layer, a gate electrode formed over the active layer, a second insulating layer formed covering the first insulation layer and the gate electrode, and a first conductive layer formed on the source and drain regions and contacting the second insulating layer.

Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a plurality of transistors formed on the substrate; and a light-emitting device connected to the plurality of transistors, wherein the transistor includes a gate electrode, the plurality of transistors include a first transistor and a second transistor of which lateral wall slope angles of the gate electrode are different from each other, and the first transistor further includes a doping control member formed on a lateral wall of the gate electrode.

Abstract: A blind display device includes a plurality of curved display panels, a support, and a plurality of rotators. Each of the curved display panels includes a curved display area between a flat display area and a bezel area. The support guides movement of the curved display panels. The rotators couple corresponding ones of the curved display panels to the support and rotate corresponding ones of the curved display panels.

Abstract: A thin film transistor (TFT), method of manufacturing the TFT and a flat panel display having the TFT are disclosed. In one aspect, the TFT comprises a substrate and an active layer formed over the substrate, wherein the active layer is formed of oxide semiconductor, and wherein the active layer includes two opposing sides. The TFT also comprises source and drain regions formed at the opposing sides of the active layer, a first insulating layer formed over the active layer, a gate electrode formed over the active layer, a second insulating layer formed covering the first insulation layer and the gate electrode, and a first conductive layer formed on the source and drain regions and contacting the second insulating layer.

Abstract: A display substrate includes an active pattern, a gate electrode, a first insulation layer and a pixel electrode. The active pattern is disposed on a base substrate. The active pattern includes a metal oxide semiconductor. The gate electrode overlaps the active pattern. The first insulation layer covers the gate electrode and the active pattern, and a contact hole is defined in the first insulation layer. The pixel electrode is electrically connected to the active pattern via the contact hole penetrating the first insulation layer. A first angle defined by a bottom surface of the first insulation layer and a sidewall of the first insulation layer exposed by the contact hole is between about 30° and about 50°.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: An OLED display and a method of manufacturing the same are disclosed. In one aspect, the OLED display includes a substrate and a semiconductor layer formed over the substrate, wherein the semiconductor layer includes a channel and a contact region formed on opposing sides of the channel. The display also includes an insulating layer formed over the semiconductor layer and having a contact hole exposing the contact region, and an OLED formed over the insulating layer, wherein the OLED is electrically connected to the contact region through the contact hole, and wherein at least a portion of the contact hole is formed directly above the contact region.

Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.

Abstract: A thin film transistor (TFT) array substrate includes a substrate, a gate electrode, a gate line, a first data line, and a second data line on the substrate, a gate insulating layer that covers the gate electrode and the gate line and includes a first opening that exposes a portion of the first data line and a second opening that exposes a portion of the second data line, an active layer disposed on the gate insulating layer so that at least one portion of the active layer overlaps the gate electrode, a drain electrode and a source electrode that extend from opposite sides of the active layer, a pixel electrode that extends from the drain electrode, and a connection wiring that extends from the source electrode, and connects the first data line to the second data line through the first and second openings of the gate insulating layer.

Abstract: The present invention provides a method for producing a film which contains a tasteless donepezil-free base, has an appropriate size and thickness, has flexibility for providing stability when handled so as to not easily tear, and has a uniformly dispersed donepezil-free base. In addition, the present invention provides a film containing the donepezil-free base produced through the method.

Abstract: The present disclosure relates to a film formulation for oral administration, containing tadalafil free base and a method of preparing the same, and a film may be provided with maximized dispersion stability of tadalafil free base in the film by the addition of a dispersion stabilizing agent in small amounts without unique fragrance or favor that may appear when other dispersion stabilizing agents known in the art are used, and an extremely low likelihood that a reagglomeration phenomenon of tadalafil free base particles will occur, and an amount of bubbles generated may be significantly reduced during a production process.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract: A display substrate and a method for manufacturing a display substrate are disclosed. In the method, a gate electrode is formed on a base substrate. An active pattern is formed using an oxide semiconductor. The active pattern partially overlaps the gate electrode. A first insulation layer pattern and a second insulation layer pattern are sequentially formed on the active pattern. The first insulation layer pattern and the second insulation layer pattern overlap the gate electrode. A third insulation layer is formed to cover the active pattern, the first insulation layer pattern and the second insulation layer pattern. Either the first insulation layer pattern or the second insulation layer pattern includes aluminum oxide. Forming the first insulation layer pattern and the second insulation layer pattern includes performing a backside exposure process using the gate electrode as an exposure mask.

Abstract: A display substrate includes a data pad on a base substrate, a first buffer layer which covers the data pad, a second buffer layer pattern which is disposed on the first buffer layer and separated from the data pad in a plan view, an active layer on the second buffer layer pattern, a gate insulation layer pattern on the active layer, both ends of the active layer exposed by the gate insulation layer pattern, and a gate electrode on the gate insulation layer pattern.

Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.

Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.

Abstract: A thin film transistor (TFT), method of manufacturing the TFT and a flat panel display having the TFT are disclosed. In one aspect, the TFT comprises a substrate and an active layer formed over the substrate, wherein the active layer is formed of oxide semiconductor, and wherein the active layer includes two opposing sides. The TFT also comprises source and drain regions formed at the opposing sides of the active layer, a first insulating layer formed over the active layer, a gate electrode formed over the active layer, a second insulating layer formed covering the first insulation layer and the gate electrode, and a first conductive layer formed on the source and drain regions and contacting the second insulating layer.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor and a display device having the thin film transistor capable of reducing the voltage between the source and drain electrodes of the thin film transistor are disclosed. One inventive aspect includes a gate electrode, a semiconductor pattern, a source electrode and a drain electrode. The source and drain electrodes are formed on the semiconductor pattern and spaced apart from each other. At least one of the source electrode and the drain electrode does not overlap the gate electrode.