Patents by Inventor Geza Dezsi
Geza Dezsi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12224218Abstract: Semiconductor packages and, more particularly, semiconductor packages with increased power handling capabilities are disclosed. Semiconductor packages may include lead frame structures and corresponding housings that incorporate semiconductor die. To promote increased current and voltage capabilities, exemplary semiconductor packages include one or more arrangements of creepage extension structures, lead frame structures that may include integral thermal pads, additional thermal elements, and combinations thereof. Creepage extension structures may be arranged as part of top sides of semiconductor packages along with thermal pads of lead frame structures and additional thermal elements. Creepage extension structures may also be arranged as part of top sides and along on one or more peripheral edges of semiconductor packages to promote further increases in power handling.Type: GrantFiled: February 11, 2022Date of Patent: February 11, 2025Assignee: WOLFSPEED, INC.Inventors: Geza Dezsi, Devarajan Balaraman, Brice McPherson
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Publication number: 20240312866Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: ApplicationFiled: January 26, 2024Publication date: September 19, 2024Applicant: The Johns Hopkins UniversityInventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Publication number: 20240312867Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: ApplicationFiled: January 26, 2024Publication date: September 19, 2024Applicant: The Johns Hopkins UniversityInventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Publication number: 20240304507Abstract: Power semiconductor packages are provided. In one example, a power semiconductor package may include a power semiconductor die. The power semiconductor package may include a housing having a first side and a second side opposing the first side. The power semiconductor package may include one or more electrical leads extending from the first side. The power semiconductor package may include one or more leadless surface mount type (SMT) connection structures on the second side.Type: ApplicationFiled: March 6, 2023Publication date: September 12, 2024Inventors: Geza Dezsi, Yusheng Lin, Kuldeep Saxena
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Patent number: 11908769Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: GrantFiled: December 23, 2020Date of Patent: February 20, 2024Assignee: The Johns Hopkins UniversityInventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Publication number: 20230378010Abstract: A power semiconductor device comprises a package, a power semiconductor die within the package, and a moisture barrier on an upper surface and side surfaces of an exterior of the package.Type: ApplicationFiled: May 18, 2022Publication date: November 23, 2023Inventors: Dev Balaraman, Geza Dezsi, Daniel Richter
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Publication number: 20230260861Abstract: Semiconductor packages and, more particularly, semiconductor packages with increased power handling capabilities are disclosed. Semiconductor packages may include lead frame structures and corresponding housings that incorporate semiconductor die. To promote increased current and voltage capabilities, exemplary semiconductor packages include one or more arrangements of creepage extension structures, lead frame structures that may include integral thermal pads, additional thermal elements, and combinations thereof. Creepage extension structures may be arranged as part of top sides of semiconductor packages along with thermal pads of lead frame structures and additional thermal elements. Creepage extension structures may also be arranged as part of top sides and along on one or more peripheral edges of semiconductor packages to promote further increases in power handling.Type: ApplicationFiled: February 11, 2022Publication date: August 17, 2023Inventors: Geza Dezsi, Devarajan Balaraman, Brice McPherson
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Patent number: 11289756Abstract: An apparatus includes an anode of a cell for a battery, a cathode of the cell, an anode thermoelectric device, and a cathode thermoelectric device. The anode thermoelectric device may be operably coupled to the anode of the cell, and the anode thermoelectric device may be connected in electrical series with the anode of the cell. The cathode thermoelectric device may be operably coupled to the cathode of the cell, and the cathode thermoelectric device being connected in electrical series with the cathode of the cell. The cathode thermoelectric device and the anode thermoelectric device may operate as a heat pump system configured to remove heat from the cathode and provide heat to the anode in response to the cell being discharged, and remove heat from the anode and provide heat to the cathode in response to the cell being charged.Type: GrantFiled: May 16, 2019Date of Patent: March 29, 2022Assignee: The Johns Hopkins UniversityInventors: Rama Venkatasubramanian, Geza Dezsi
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Publication number: 20210151360Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: ApplicationFiled: December 23, 2020Publication date: May 20, 2021Inventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Patent number: 10903139Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: GrantFiled: September 11, 2017Date of Patent: January 26, 2021Assignee: The Johns Hopkins UniversityInventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Patent number: 10734565Abstract: An electric generator device is provided that includes a thermoelectric array, a base plate, and an electric power output. The thermoelectric array may include a hot side portion and a cold side portion. The base plate may be configured to receive heat from a heat source to be transferred to the hot side portion of the thermoelectric array. The electric power output may be electrically coupled to the thermoelectric array. The thermoelectric array may be configured to convert a temperature differential into an electric voltage for output to the electric power output. The power generation housing may be configured to hold a heat rejection substance that absorbs heat from the cold side portion of the thermoelectric array to facilitate generation of the temperature differential between the hot side portion and the cold side portion of the thermoelectric array.Type: GrantFiled: December 22, 2017Date of Patent: August 4, 2020Assignee: The Johns Hopkins UniversityInventors: Jonathan M. Pierce, Rama Venkatasubramanian, Geza Dezsi, Drew P. Seker, Craig B. Leese
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Publication number: 20190356030Abstract: An apparatus includes an anode of a cell for a battery, a cathode of the cell, an anode thermoelectric device, and a cathode thermoelectric device. The anode thermoelectric device may be operably coupled to the anode of the cell, and the anode thermoelectric device may be connected in electrical series with the anode of the cell. The cathode thermoelectric device may be operably coupled to the cathode of the cell, and the cathode thermoelectric device being connected in electrical series with the cathode of the cell. The cathode thermoelectric device and the anode thermoelectric device may operate as a heat pump system configured to remove heat from the cathode and provide heat to the anode in response to the cell being discharged, and remove heat from the anode and provide heat to the cathode in response to the cell being charged.Type: ApplicationFiled: May 16, 2019Publication date: November 21, 2019Inventors: Rama Venkatasubramanian, Geza Dezsi
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Publication number: 20180248101Abstract: An electric generator device is provided that includes a thermoelectric array, a base plate, and an electric power output. The thermoelectric array may include a hot side portion and a cold side portion. The base plate may be configured to receive heat from a heat source to be transferred to the hot side portion of the thermoelectric array. The electric power output may be electrically coupled to the thermoelectric array. The thermoelectric array may be configured to convert a temperature differential into an electric voltage for output to the electric power output. The power generation housing may be configured to hold a heat rejection substance that absorbs heat from the cold side portion of the thermoelectric array to facilitate generation of the temperature differential between the hot side portion and the cold side portion of the thermoelectric array.Type: ApplicationFiled: December 22, 2017Publication date: August 30, 2018Inventors: Jonathan M. Pierce, Rama Venkatasubramanian, Geza Dezsi, Drew P. Seker, Craig B. Leese
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Publication number: 20180138106Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.Type: ApplicationFiled: September 11, 2017Publication date: May 17, 2018Inventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
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Patent number: D1056862Type: GrantFiled: August 24, 2022Date of Patent: January 7, 2025Assignee: Wolfspeed, Inc.Inventors: Geza Dezsi, Devarajan Balaraman, Brice McPherson