Semiconductor package

Description

FIG. 1 is a top perspective view of a semiconductor package;

FIG. 2 is a bottom perspective view of the semiconductor package of FIG. 1;

FIG. 3 is a top view of the semiconductor package of FIG. 1;

FIG. 4 is a bottom view of the semiconductor package of FIG. 1;

FIG. 5 is a side view of the semiconductor package of FIG. 1;

FIG. 6 is an opposing side view of the semiconductor package of FIG. 1;

FIG. 7 is an end view of the semiconductor package of FIG. 1; and,

FIG. 8 is an opposing end view of the semiconductor package of FIG. 1.

The broken lines shown in the drawings depict portions of the semiconductor package that form no part of the claimed design.

Claims

The ornamental design for a semiconductor package, as shown and described.