Patents by Inventor Giang T. Dao

Giang T. Dao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8786130
    Abstract: A method of forming an electromechanical power switch for controlling power to integrated circuit (IC) devices and related devices. At least some of the illustrative embodiments are methods comprising forming at least one IC device on a front surface of a semiconductor substrate. The at least one IC device includes at least one circuit block and at least one power switch circuit. A dielectric layer is deposited on the IC device, and first and second electromechanical power switches are formed on the dielectric layer. The first power switch gates a voltage to the circuit block and the second power switch gates the voltage to the IC device. The first power switch is actuated by the power switch circuit, and the voltage to the circuit block is switched off. Alternatively, the second power switch is actuated by the power switch circuit, and the voltage to the IC device is switched off.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: July 22, 2014
    Assignee: INOSO, LLC
    Inventors: Kiyoshi Mori, Ziep Tran, Giang T. Dao, Michael E. Ramon
  • Patent number: 7368020
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: May 6, 2008
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Publication number: 20040191649
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Application
    Filed: April 5, 2004
    Publication date: September 30, 2004
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Patent number: 6763608
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: July 20, 2004
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Patent number: 6732746
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: May 11, 2004
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Patent number: 6715495
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: April 6, 2004
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Patent number: 6569582
    Abstract: Apparatus and methods to protect a photomask that is used for semiconductor photolithography at wavelengths outside the visible spectrum include a hinged pellicle that is rotated away from the photomask during exposure. The pellicle can be transparent or opaque. In one embodiment, the photomask is supported by a photomask base, and the pellicle is hinged to one side of the photomask base. The pellicle can be moved away from the photomask by a robot arm. When covering the photomask base, the pellicle can be secured to it with a securing mechanism such as a vacuum arrangement. Methods of use are also described.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: May 27, 2003
    Assignee: Intel Corporation
    Inventors: Jerry C. Cullins, Giang T. Dao
  • Publication number: 20030035096
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Application
    Filed: September 26, 2002
    Publication date: February 20, 2003
    Applicant: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Publication number: 20020155358
    Abstract: Apparatus and methods to protect a photomask that is used for semiconductor photolithography at wavelengths outside the visible spectrum include a hinged pellicle that is rotated away from the photomask during exposure. The pellicle can be transparent or opaque. In one embodiment, the photomask is supported by a photomask base, and the pellicle is hinged to one side of the photomask base. The pellicle can be moved away from the photomask by a robot arm. When covering the photomask base, the pellicle can be secured to it with a securing mechanism such as a vacuum arrangement. Methods of use are also described.
    Type: Application
    Filed: April 23, 2001
    Publication date: October 24, 2002
    Applicant: Intel Corporation
    Inventors: Jerry C. Cullins, Giang T. Dao
  • Patent number: 6279249
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: August 28, 2001
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Publication number: 20010005944
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Application
    Filed: December 13, 2000
    Publication date: July 5, 2001
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Publication number: 20010006418
    Abstract: A method of transporting a reticle is disclosed. The reticle is placed in a reticle carrier that has an ionizer. Moreover, the reticle may be attached with a pellicle. The pellicle consists of a pellicle frame and a pellicle film stretched over the pellicle frame. The pellicle frame has included within an absorbent material.
    Type: Application
    Filed: December 13, 2000
    Publication date: July 5, 2001
    Inventors: Giang T. Dao, Ronald J. Kuse
  • Patent number: 5881125
    Abstract: An attenuated phase-shifted reticle. The disclosed reticle comprises a sub-resolution pattern, in regions other than the features to be formed. The sub-resolution pattern transmits a substantially uniform, attenuated radiation intensity. The features are phase-shifted relative to the sub-resolution pattern, such that light transmitted through them is approximately 180.degree. out of phase compared with the attenuated radiation transmitted through the sub-resolution pattern surrounding the features. In this way, the sub-resolution pattern acts as a phase-shifter for the features.
    Type: Grant
    Filed: September 25, 1992
    Date of Patent: March 9, 1999
    Assignee: Intel Corporation
    Inventor: Giang T. Dao
  • Patent number: 5789118
    Abstract: An attenuating phase metrology cell on a reticle comprising an attenuating feature and a binary feature. The metrology cell is used to determine amount of focal shift associated with the attenuating phase-shifting material. A dimension of an image of the attenuating feature is measured at a number of focal distances from the reticle. Thereafter a first relationship between the measurements of the attenuating feature and the focal distance is determined. A dimension of an aerial image of the binary feature is also measured at a number of focal distances from the reticle. The relationship between the measurements of the binary feature and focal distance is determined. An amount of focal shift is then determined based upon the first and second relationships. The attenuating metrology pattern can thus be included on an attenuating phase-shifting reticle, such that the focal shift of the attenuating phase-shifting reticle can be determined.
    Type: Grant
    Filed: December 11, 1996
    Date of Patent: August 4, 1998
    Assignee: Intel Corporation
    Inventors: Gang Liu, Giang T. Dao, Alan M. Snyder
  • Patent number: 5700602
    Abstract: A metrology pattern on a reticle comprising a phase-shifted feature and an additional phase-shifted feature and/or non phase-shifted feature is disclosed. The metrology pattern can be used to determine the target thickness for achieving 180.degree. phase difference, i.e., zero phase error on a phase-shifted reticle. A test reticle having several such metrology patterns, with several different phase-shifter thickness differences is used to produce a CD versus defocus data for each of the phase-shifter thickness differences by performing an exposure matrix or series of aerial images. The data can be used to determine a target thickness for zero phase error. The data can also be used to determine a correlation between focal shift, phase error, and shifter thickness. The metrology pattern can be placed on reticles used for the fabrication of semiconductor devices, for example, so that an exposure matrix can be performed, to determine any focal shift, which can then be related to phase error.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: December 23, 1997
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Nelson N. Tam, Gang Liu, Jeffrey N. Farnsworth
  • Patent number: 5688409
    Abstract: A new process and an improved process for fabricating device layers with ultrafine features. In one embodiment a device layer to be patterned is deposited above a substrate and a photoresist layer is deposited above that device layer. A reticle having a first transparent layer and a second opaque layer is used to pattern the photoresist layer. The reticle includes a first region with a first phase and a second region with a second phase such that the incident radiation is shifted when passing through the reticle. The second reticle layer is disposed above the first reticle layer and proximate to the location where the first region transitions to the second region of the first reticle layer. A stepper is used to expose the photoresist to radiation through the reticle. The critical dimensions of the device layer being patterned are controlled by adjusting the partial coherence of the stepper during exposure.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: November 18, 1997
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Joseph C. Langston
  • Patent number: 5635316
    Abstract: A device layer layout methodology, and method and apparatus for patterning a photosensitive layer. Device features are placed on lines running in rows and/or columns during layout. The lines and/or columns are extracted from the database to produce a layout of the phase-edge phase shifting layer. The photosensitive layer may be exposed to a mask corresponding to this layout, to produce latent image of the rows and/or lines. The photosensitive layer is also exposed to the device layer layout to expose unwanted portions of the phase-edge layer. Methods of forming a variety of device features, including contact/via openings and contact/via plugs are disclosed.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: June 3, 1997
    Assignee: Intel Corporation
    Inventor: Giang T. Dao
  • Patent number: 5633102
    Abstract: Methods of forming a patterned layer using a reticle having a phase-shifting element and the reticles for making the patterns are disclosed. The methods of the present invention use a phase-shifting element to change the phase of the radiation exiting a reticle about 180.degree. out of phase compared to the radiation exiting the areas immediately adjacent to an edge of the phase-shifting element so that radiation from both areas near the edge destructively interfere with each other so as to cancel out one another thereby resulting in a substantially unexposed region on a semiconductor substrate. The present invention can be used to prevent exposing a large area by using a set of phase-shifting elements to form a grating or checkerboard area.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: May 27, 1997
    Assignee: Intel Corporation
    Inventors: Kenny K. H. Toh, Giang T. Dao, Eng T. Gaw, Rajeev R. Singh
  • Patent number: 5620816
    Abstract: A device layer layout methodology, and method and apparatus for patterning a photosensitive layer. Device features are placed on lines running in rows and/or columns during layout. The lines and/or columns are extracted from the database to produce a layout of the phase-edge phase shifting layer. The photosensitive layer may be exposed to a mask corresponding to this layout, to produce latent image of the rows and/or lines. The photosensitive layer is also exposed to the device layer layout to expose unwanted portions of the phase-edge layer. Methods of forming a variety of device features, including contact/via openings and contact/via plugs are disclosed.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: April 15, 1997
    Assignee: Intel Corporation
    Inventor: Giang T. Dao
  • Patent number: 5618643
    Abstract: A method and apparatus for fabricating a mask for use in patterning a radiation sensitive layer in a lithographic printer. An embedded phase shifting layer is disposed over a substantially transparent base layer such that attenuated regions of the mask are phase shifted approximately 160 to 200 degrees relative to open features in the mask. In accordance with the present invention, radiation transmission is reduced through the open feature regions of the mask. In one embodiment, a thin radiation transmission reducing layer is deposited over the open feature regions of the mask. In another embodiment, the open feature regions of the mask are roughened to reduce radiation transmission. In yet another embodiment, ion implantation is performed in the open feature regions of the mask to reduce transmission. With the reduced transmission of radiation through the open feature regions of the present mask, high resolution lithography employing short wavelength radiation is realized.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: April 8, 1997
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Gang Liu