Abstract: A system and method is provided to lock or unlock a gladhand coupler on a towed asset to prevent connection of a tractor air line to the gladhand is provided. The system prevents the tractor from properly operating the towed asset brakes and therefore prevents the unauthorized movement of the towed asset. The system has a locking mechanism that blocks the surface on the gladhand used for coupling with another gladhand coupler.

Abstract: A smart nose box is provided that includes both a housing portion and a lid portion. The housing portion includes monitoring circuits for monitoring the health of lamps in a towable asset. The lid portion includes a battery, a GPS receiver, and a telematics transceiver.

Abstract: An automated asset monitoring system is provided for a towable asset. The system includes a power supply voltage that may be converted to power a monitored circuit during an active mode of operation while the towable asset is not connected to a tractor. The system powers the monitored circuit during the active mode so that a message regarding an operating condition of the monitored circuit may be transmitted by a telematics transceiver to a remote user.

Abstract: A TPMS sensor for towable asset is configured to not only report a tire pressure but also whether the tire has moved. A telematics transceiver may then maintain a GNSS receiver in a sleep mode of operation (e.g., powered down) while the TPMS sensor does not report any motion.

Abstract: A method is described for operating an asset tracking device, wherein the tracking device normally collects many location points at a high periodic rate and transmits the location points as a single compressed location history data block at a low periodic rate, which greatly reduces the amount of transmitted data required to send a detailed location history. When a user begins actively viewing the asset location in some application such as on a mobile device, a command is immediately sent from the tracking server back to the tracking device. This command causes the device to start transmitting location reports at a high periodic rate, thereby allowing the user to monitor the current location of the asset in real-time. Transmission at the high data rate required for real-time monitoring only occurs while the user is actively interacting with the application, which is usually a short period of time.

Abstract: A system and method is provided to lock or unlock a gladhand coupler on a towed asset to prevent connection of a tractor air line to the gladhand is provided. The system prevents the tractor from properly operating the towed asset brakes and therefore prevents the unauthorized movement of the towed asset. The system has a locking mechanism that blocks the surface on the gladhand used for coupling with another gladhand coupler.

Abstract: The present invention provides a monitoring system for cargo carrying vehicle including a container/trailer including at least one door, a door sensing device for monitoring the open or closed status of the door(s), a cellular communications device wirelessly transmitting information to one or more remote facilities/sites include the status of the door(s) as monitored by the door status sensor, telemetry device to identify the position of the cargo container and cargo sensing device to obtain information about contents in the interior of the cargo container. Further, embodiment of the present invention provides that fingerprint of the door opening and closing can be measured from the 3 sensors (i.e. accelerometer, compass and gyroscope) can be stored in the microprocessor onboard in the monitoring apparatus.

Abstract: A method is described for operating an asset tracking device, wherein the tracking device normally collects many location points at a high periodic rate and transmits the location points as a single compressed location history data block at a low periodic rate, which greatly reduces the amount of transmitted data required to send a detailed location history. When a user begins actively viewing the asset location in some application such as on a mobile device, a command is immediately sent from the tracking server back to the tracking device. This command causes the device to start transmitting location reports at a high periodic rate, thereby allowing the user to monitor the current location of the asset in real-time. Transmission at the high data rate required for real-time monitoring only occurs while the user is actively interacting with the application, which is usually a short period of time.

Abstract: The presence of a powered CAN bus is a good indicator of whether an aftermarket telematics device powered by a vehicle OBD port should enter a low-power mode to prevent unwanted battery drain, as the vehicle will remove power from the CAN bus when it determines the vehicle is not in use. Circuitry in the telematics device monitors the voltage on the CAN bus wires of the OBD port to determine whether the CAN voltage is above or below some threshold, such as 1V. This enables the vehicle ON/OFF status to be determined reliably without any additional wiring in the vehicle. The circuitry may include a simple, inexpensive, and low-power integrated circuit comparator, an operational amplifier, or an ADC to determine whether the vehicle is ON or OFF based on the CAN voltage. A very simple embodiment uses a single MOSFET and resistor to detect the vehicle ON/OFF state.

Abstract: The presence of a powered CAN bus is a good indicator of whether an aftermarket telematics device powered by a vehicle OBD port should enter a low-power mode to prevent unwanted battery drain, as the vehicle will remove power from the CAN bus when it determines the vehicle is not in use. Circuitry in the telematics device monitors the voltage on the CAN bus wires of the OBD port to determine whether the CAN voltage is above or below some threshold, such as 1V. This enables the vehicle ON/OFF status to be determined reliably without any additional wiring in the vehicle. The circuitry may include a simple, inexpensive, and low-power integrated circuit comparator, an operational amplifier, or an ADC to determine whether the vehicle is ON or OFF based on the CAN voltage. A very simple embodiment uses a single MOSFET and resistor to detect the vehicle ON/OFF state.

Abstract: The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is unusable and should be shifted out of operation. The software programmable element includes a programmable register adapted to shift in an appropriate value indicating that at least one of the memory cells is flawed. The hardware element includes a fuse gated with the programmable register. Shifting is indicated either by software programmable fuse or hard fuse. Soft fuse registers may be chained together forming a shift register.

Abstract: The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is unusable and should be shifted out of operation. The software programmable element includes a programmable register adapted to shift in an appropriate value indicating that at least one of the memory cells is flawed. The hardware element includes a fuse gated with the programmable register. Shifting is indicated either by software programmable fuse or hard fuse. Soft fuse registers may be chained together forming a shift register.

Abstract: Aspects of the invention for testing and debugging an embedded device under test may include the step of loading an instruction into a parameterized shift register of a BIST module coupled to each one of a plurality of embedded memory modules comprising the embedded device under test. An identity of the loaded instruction may be determined subsequent to loading the instruction into the parameterized shift register. A plurality of test signals may be generated which correspond to the determined identity of the loaded instruction. In this regard, each of the generated plurality of test signals may control the execution of the testing and debugging of a corresponding one of each of the plurality of embedded memory modules that make up the embedded device under test.

Abstract: Aspects of the invention may include testing and debugging an embedded device under test. Testing and debugging and embedded device under test may include the step of loading an instruction into a parameterized shift register of each one of a plurality of BIST modules coupled to an individual one of a plurality of embedded memory modules comprising the embedded device under test. An identity of each of the instruction loaded into the parameterized shift register of each one of the plurality of BIST modules may subsequently be determined. A separate test signal may be generated from each one of the plurality of BIST modules corresponding to the determined identity of the instruction loaded in each one of the plurality of BIST modules, each one of the generated test signals causing control and execution of the testing and debugging of a corresponding one of each of the plurality of embedded memory modules comprising the embedded device under test.

Abstract: The present invention relates to a system and method for processing the read and write operations in a memory architecture. The system processing the read and write operations includes at least one local memory block and a synchronously controlled global controller coupled to the local memory block and adapted to extend the high portion of a clock pulse. The method for processing the read and write operations includes skewing a clock pulse using at least one word line interfacing with the global controller.

Abstract: In one embodiment, a CAM is provided that includes; a plurality of memory cells grouped to store a word, wherein the memory cells are organized into a plurality of ripple groups, each ripple group including a complex logic gate configured to determine whether a stored content for the ripple group's memory cells matches a corresponding portion of a comparand word if an enable input for the ripple group is asserted, each complex logic gate asserting an output if the determination indicates a match, the ripple groups being arranged from a first ripple group to a last ripple group such that the output from the first ripple group's complex logic gate functions as the enable input for a second ripple group's complex logic gate and so on such that an output from a next-to-last ripple group's complex logic gate functions as the enable input for the last ripple group's complex logic gate.

Abstract: The present invention relates to a system and method for providing redundancy in a hierarchically memory, by replacing small blocks in such memory. The present invention provides such redundancy (i.e., replaces such small blocks) by either shifting predecoded lines or using a modified shifting predecoder circuit in the local predecoder block. In one embodiment, the hierarchal memory structure includes at least one active predecoder adapted to be shifted out of use; and at least one redundant predecoder adapted to be shifted in to use.

Abstract: In one embodiment, a sense amplifier includes: a differential amplifier adapted to amplify a voltage difference between a pair of bit lines; and a self-bias generation circuit adapted to reduce an offset bias in the differential amplifier with regard to the amplification of the voltage difference between the pair of bit lines.

Abstract: In one embodiment, NMOS transistors have their source coupled to a common source node such that the NMOS transistors conduct a leakage current if the common source node is grounded. To reduce this leakage current, the common source node is raised in potential. Similarly, PMOS transistors have their source coupled to a common source node such that the PMOS transistors conduct a leakage current if the common source node is charged to a power supply voltage VDD. To reduce this leakage current, the common source node is lowered in potential.

Abstract: The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is unusable and should be shifted out of operation. The software programmable element includes a programmable register adapted to shift in an appropriate value indicating that at least one of the memory cells is flawed. The hardware element includes a fuse gated with the programmable register. Shifting is indicated either by software programmable fuse or hard fuse. Soft fuse registers may be chained together forming a shift register.