Abstract: Storing data in a non-volatile latch may include applying a bias voltage to a memristor pair in electrical communication with at least one logic gate and applying a gate voltage to a transmission gate to allow an input voltage to be applied to the at least one logic gate where the input voltage is greater than the bias voltage and the input voltage determines a resistance state of the memristor pair.

Abstract: A memelectronic device may have a first and a second electrode spaced apart by a plurality of materials. A first material may have a memory characteristic exhibited by the first material maintaining a magnitude of an electrically controlled physical property after discontinuing an electrical stimulus on the first material. A second material may have an auxiliary characteristic.

Abstract: A memory device includes a first conductive layer, a second conductive layer, an in-bit current limiter including a voltage controlled negative differential resistance (VC-NDR) layer in electrical contact with the first conductive layer and a memristor element in electrical contact with the VC-NDR layer and the second conductive layer. A method for programming a memory device that comprises a VC-NDR device is also provided.

Abstract: On example of the present invention is a nanoscale electronic device comprising a first conductive electrode, a second conductive electrode, and a device layer. The device layer comprises a first dielectric material, between the first and second conductive electrodes, that includes an effective device layer, a first barrier layer near a first interface between the first conductive electrode and the device layer, and a second barrier layer near a second interface between the second conductive electrode and the device layer. A second example of the present invention is an integrated circuit that incorporates nanoscale electronic devices of the first example.

Abstract: A hybrid circuit comprises a nitride-based transistor portion and a memristor portion. The transistor includes a source and a drain and a gate for controlling conductance of a channel region between the source and the drain. The memristor includes a first electrode and a second electrode separated by an active switching region. The source or drain of the transistor forms one of the electrodes of the memristor.

Abstract: A nitride-based memristor memristor includes: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and active region positioned between the first electrode and the second electrode. The active region includes an electrically semiconducting or nominally insulating and weak ionic switching nitride phase. A method for fabricating the nitride-based memristor is also provided.

Abstract: A field-programmable analog array (FPAA) includes a digital signal routing network, an analog signal routing network, switch elements to interconnect the digital signal routing network with the analog signal routing network, and a configurable analog block (CAB) connected to the analog signal routing network and having a programmable resistor array. The switch elements are implemented via digital memristors, the programmable resistor array is implemented via analog memristors, and/or antifuses within one or more of the digital signal routing network and the analog signal routing network are implemented via digital memristors.

Abstract: A memristor has a first electrode, a second electrode parallel to the first electrode, and a switching layer disposing between the first and second electrodes. The switching layer contains a conduction channel and a reservoir zone. The conduction channel has a Fermi glass material with a variable concentration of mobile ions. The reservoir zone is laterally disposed relative to the conduction channel, and functions as a source/sink of mobile ions for the conduction channel In the switching operation, under the cooperative driving force of both electric field and thermal effects, the mobile ions are moved into or out of the laterally disposed reservoir zone to vary the concentration of the mobile ions in the conduction channel to change the conductivity of the Fermi glass material.

Abstract: Low energy memristors with engineered switching channel materials include: a first electrode; a second electrode; and a switching layer positioned between the first electrode and the second electrode, wherein the switching layer includes a first phase comprising an insulating matrix in which is dispersed a second phase comprising an electrically conducting compound material for forming a switching channel.

Abstract: A heat mitigated bipolar resistive switch includes a BRS matrix sandwiched between first and second electrodes and a heat mitigator. The BRS matrix is to support bipolar switching of a conduction channel formed between the first and second electrodes through BRS matrix. The heat mitigator is to reduce heat in the BRS matrix generated during bipolar switching. The heat mitigator includes one or both of a parallel-connected NDR element to limit current flowing in the BRS matrix and a high thermal conductivity material to conduct the generated heat away from the BRS matrix above a predetermined elevated temperature.

Abstract: Storing data in a non-volatile latch may include applying a bias voltage to a memristor pair in electrical communication with at least one logic gate and applying a gate voltage to a transmission gate to allow an input voltage to be applied to the at least one logic gate where the input voltage is greater than the bias voltage and the input voltage determines a resistance state of the memristor pair.

Abstract: A memristor array includes a lower layer of crossbars, upper layer of crossbars intersecting the lower layer of crossbars, memristor cells interposed between intersecting crossbars, and pores separating adjacent memristor cells. A method forming a memristor array is also provided.

Abstract: A memory device includes a first conductive layer, a second conductive layer, an in-bit current limiter including a voltage controlled negative differential resistance (VC-NDR) layer in electrical contact with the first conductive layer and a memristor element in electrical contact with the VC-NDR layer and the second conductive layer. A method for programming a memory device that comprises a VC-NDR device is also provided.

Abstract: Chaotic oscillator-based random number generation is described. In an example, a circuit includes a negative differential resistance (NDR) device to receive an alternating current (AC) bias. The circuit further includes a capacitance in parallel with the NDR device, the capacitance having a value such that, in response to a direct current (DC) bias applied to the NDR device and the capacitance, a voltage across the capacitance oscillates with a chaotic period. The circuit further includes a random number generator to generate random numbers using samples of the voltage across the capacitance.

Abstract: A memelectronic device may have a first and a second electrode spaced apart by a plurality of materials. A first material may have a memory characteristic exhibited by the first material maintaining a magnitude of an electrically controlled physical property after discontinuing an electrical stimulus on the first material. A second material may have an auxiliary characteristic.

Abstract: Nanoscale switching devices are disclosed. The devices have a first electrode of a nanoscale width; a second electrode of a nanoscale width; and a layer of an active region disposed between and in electrical contact with the first and second electrodes. The active region contains a switching material capable of carrying a significant amount of defects which can trap and de-trap electrons under electrical bias. The switching material is in an amorphous state. A nanoscale crossbar array containing a plurality of the devices and a method for making the devices are also disclosed.

Abstract: An electroforming free memristor includes a first electrode, a second electrode spaced from the first electrode, and a switching layer positioned between the first electrode and the second electrode. The switching layer is formed of a matrix of a switching material and reactive particles that are to react with the switching material during a fabrication process of the memristor to form one or more conductance channels in the switching layer.

Abstract: An electrical circuit component includes a first electrode, a plurality of second electrodes and a negative differential resistance (NDR) material. The first electrode and the plurality of second electrodes are connected to the NDR material and the NDR material is to electrically connect the first electrode to one of the plurality of second electrodes when a sufficient voltage is applied between the first electrode and the one of the plurality of second electrodes through the NDR material.

Abstract: A two-dimensional array of switching devices comprises a plurality of crossbar tiles. Each crossbar tile has a plurality of row wire segments intersecting a plurality of column wire segments, and a plurality of switching devices each formed at an intersection of a row wire segment and a column wire segment. The array has a plurality of lateral latches disposed in a plane of the switching devices. Each lateral latch is linked to a first wire segment of a first crossbar tile and a second wire segment of a second crossbar tile opposing the first wire segment. The lateral latch is operable to close or open to form or break an electric connection between the first and second wire segments.

Abstract: An electrically actuated device includes a reactive metal layer, a first electrode established in contact with the reactive metal layer, an insulating material layer established in contact with the first electrode or the reactive metal layer, an active region established on the insulating material layer, and a second electrode established on the active region. A conductive nano-channel is formed through a thickness of the insulating material layer.