Abstract: The present invention describes a method and apparatus for mounting a microelectronic device parallel to a substrate with an interposer and two heat sinks, one on each side of the substrate.

Abstract: To accommodate thermal stresses arising from different coefficients of thermal expansion (CTE) of a packaged or unpackaged die and a substrate, the package incorporates two or more different interconnect zones. A first interconnect zone, located in a central region of the die, employs a relatively stiff interconnect structure. A second interconnect zone, located near the periphery of the die, employs a relatively compliant interconnect structure. Additional interconnect zones, situated between the first and second interconnect zones and having interconnect structure with compliance qualities intermediate those of the first and second zones, can optionally be employed. In one embodiment, solder connections providing low electrical resistance are used in the first interconnect zone, and compliant connections, such as nanosprings, are used in the second interconnect zone.

Abstract: A method for forming contacts with vertical sidewalls, high aspect ratios, improved salicide and photoresist etch selectivity at submicron dimensions. In one currently preferred embodiment, an opening is formed in a dual oxide layer by etching the undoped oxide layer at a first rate and then etching the doped oxide layer at a second rate. The etch process is performed in a low density parallel plate reactor. The process parameters of the etch are fixed in ranges which optimize the etch process and allow greater control over the critical dimensions of the opening. For example, the oxide layer is etched at a pressure in the range of approximately 100-300 mTorr and with an etch chemistry having a CHF.sub.3 :CF.sub.4 gas flow ratio in the range of approximately 3:1-1:1, respectively.

Abstract: A monitoring device to monitor process induced charge employing a single layer of polysilicon forming a floating gate. The device comprises two capacitors, one for charging and the other for discharging a floating gate of an n-channel transistor. Embodiments which permit the monitoring of positive charge, negative charge and both positive and negative charge are described. The device is reusable and lends itself to in-line monitoring as opposed to some prior art devices used for end-of-line monitoring.

Abstract: The present invention discloses a method for the etching of insulating films, specifically silicon oxide films, using a fluorine-helium-oxygen gas mixture in the fabrication of semiconductor devices. The method utilizes a prior art reactive ion etch system and adds a quantity of helium to a pre-established fluorine-oxygen chemistry to reactively etch the silicon oxide film while minimizing the occurrence of gate charging resulting from damage to the gate oxide. The addition of helium gas into the etch chemistry must be such that the flow of helium is at least 20% of the sum of the total fluorine, helium, and oxygen flows. The resulting etch chemistry, which can be used in any commercially available reactive ion etch system, produces a more uniform etch while reducing gate oxide damage so as to minimize charging of the semiconductor gate.