Abstract: There is provided an optical encoding system including a photodiode array and a code disk opposite to each other. The code disk is arranged with multiple code slits at a ring area corresponding to the photodiode array. A length direction of each photodiode of the photodiode array has at least one deviation angle with respect to a length direction of the multiple code slits to reduce the total harmonic distortion in photocurrents.

Abstract: There is provided a light control circuit including a light detector, a frequency detector, an error amplifier, an NMOS driver and a light source. The frequency detector identifies a signal frequency according to detected voltage signals outputted by the light detector and generates a control signal accordingly. The NMOS driver changes a drive current of the light source according to an output of the error amplifier. The error amplifier changes a bandwidth thereof according to the control signal from the frequency detector to regulate a response time of the drive current of the light source.

Abstract: There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including an encoding medium, multiple photodiodes and a signal processing circuit. The encoding medium includes an index track. The index track includes a first index pattern and a second index pattern. The multiple photodiodes include a first index photodiode, a second index photodiode and a reference index photodiode for receiving modulated light from the first index pattern and the second index pattern. When the first index photodiode is aligned with the first index pattern and the second index photodiode is aligned with the second index pattern, the signal processing circuit outputs a triggering signal.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided a light control circuit including a light detector, a frequency detector, an error amplifier, an NMOS driver and a light source. The frequency detector identifies a signal frequency according to detected voltage signals outputted by the light detector and generates a control signal accordingly. The NMOS driver changes a drive current of the light source according to an output of the error amplifier. The error amplifier changes a bandwidth thereof according to the control signal from the frequency detector to regulate a response time of the drive current of the light source.

Abstract: There is provided an optical encoder including an encoding medium, multiple photodiodes and a signal processing circuit. The encoding medium includes an index track. The index track includes a first index pattern and a second index pattern. The multiple photodiodes include a first index photodiode, a second index photodiode and a reference index photodiode for receiving modulated light from the first index pattern and the second index pattern. When the first index photodiode is aligned with the first index pattern and the second index photodiode is aligned with the second index pattern, the signal processing circuit outputs a triggering signal.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided a light control circuit including a light detector, a frequency detector, an error amplifier, an NMOS driver and a light source. The frequency detector identifies a signal frequency according to detected voltage signals outputted by the light detector and generates a control signal accordingly. The NMOS driver changes a drive current of the light source according to an output of the error amplifier. The error amplifier changes a bandwidth thereof according to the control signal from the frequency detector to regulate a response time of the drive current of the light source.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including an encoding medium, multiple photodiodes and a signal processing circuit. The encoding medium includes an index track. The index track includes a first index pattern and a second index pattern. The multiple photodiodes include a first index photodiode, a second index photodiode and a reference index photodiode for receiving modulated light from the first index pattern and the second index pattern. When the first index photodiode is aligned with the first index pattern and the second index photodiode is aligned with the second index pattern, the signal processing circuit outputs a triggering signal.

Abstract: There is provided a light control circuit including a light detector, a frequency detector, an error amplifier, an NMOS driver and a light source. The frequency detector identifies a signal frequency according to detected voltage signals outputted by the light detector and generates a control signal accordingly. The NMOS driver changes a drive current of the light source according to an output of the error amplifier. The error amplifier changes a bandwidth thereof according to the control signal from the frequency detector to regulate a response time of the drive current of the light source.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.

Abstract: An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.