Abstract: There is provided a phase shifter circuit of an optical encoder that receives four signals generated from photodiodes. The phase shifter circuit includes four resistor strings each coupled to two of the four signals having a 90-degrees phase pitch. By taping out different numbers of signals at different tape-out nodes of each of the four resistor strings, the phase shifter circuit is adapted to output signals for different interpolation factors without changing the mask set.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers. two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: An LED current regulator can regulate an LED current of an encoder system. The LED current regulator may comprise a first analog multiplier and a second analog multiplier. Each of the first and second analog multipliers may be configured to receive respective photodetector output signals, characterized by a peak-to-peak voltage, Vpp, and may be configured to generate respective first and second multiplier output signals. The first and second multiplier output signals may be combined to produce a first DC level, which may be representative of the peak-to-peak voltage, Vpp, of the photodetector output signals.

Abstract: Disclosed are various embodiments of circuitry and methods to compensate for variations in hysteresis associated with the comparators of an interpolation circuit in a single track optical encoder. Such variations in hysteresis may be minimized or eliminated by providing appropriately configured resistor ladder circuits to condition the inputs to the comparators, or by programming or trimming resistors in positive feedback loops of the comparators. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Abstract: An offset correction system for correcting signal offset of an encoder. The offset correction system may include a light emitter, an encoder disk, a reticle, a light detector; an offset detection circuit and an offset correction circuit. The offset detection circuit may comprise a comparator and an offset detector configured to receive sinusoidal output signals from the light detector and a reference signal to create digital pulses for determining the signal offset. The offset correction circuit may be configured to apply a gain to correct the offset output signal. The offset correction may be implemented in real time mode.

Abstract: An LED current regulator can regulate an LED current of an encoder system. The LED current regulator may comprise a first analog multiplier and a second analog multiplier. Each of the first and second analog multipliers may be configured to receive respective photodetector output signals, characterized by a peak-to-peak voltage, Vpp, and may be configured to generate respective first and second multiplier output signals. The first and second multiplier output signals may be combined to produce a first DC level, which may be representative of the peak-to-peak voltage, Vpp, of the photodetector output signals.

Abstract: An offset correction system for correcting signal offset of an encoder. The offset correction system may include a light emitter, an encoder disk, a reticle, a light detector; an offset detection circuit and an offset correction circuit. The offset detection circuit may comprise a comparator and an offset detector configured to receive sinusoidal output signals from the light detector and a reference signal to create digital pulses for determining the signal offset. The offset correction circuit may be configured to apply a gain to correct the offset output signal. The offset correction may be implemented in real time mode.

Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring current amplifiers disposed in the signal generating circuit thereof. Voltage amplifiers and their associated feedback resistors are eliminated in the various embodiments disclosed herein, resulting in decreased die size and improved encoder signal accuracy and performance, especially at high speeds The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Abstract: Disclosed are various embodiments of circuitry and methods to compensate for variations in hysteresis associated with the comparators of an interpolation circuit in a single track optical encoder. Such variations in hysteresis may be minimized or eliminated by providing appropriately configured resistor ladder circuits to condition the inputs to the comparators, or by programming or trimming resistors in positive feedback loops of the comparators. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring increased spatial resolution, reduced cross-talk between adjoining photodiodes, and increased amplitude output signals from individual photodiodes. With respect to prior art single track optical encoders, some photodiodes are removed from a photodiode array, while nevertheless maintaining appropriate phase relationships between pairs of A and A\, and B and B\, photodiodes. Such a configuration of photodiodes results in increased inter-photodiode spacing, and thereby permits spatial resolution to be increased while boosting current outputs from individual photodiodes. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided.

Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring current amplifiers disposed in the signal generating circuit thereof. Voltage amplifiers and their associated feedback resistors are eliminated in the various embodiments disclosed herein, resulting in decreased die size and improved encoder signal accuracy and performance, especially at high speeds The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: Disclosed are various embodiments of pulse generation and automatic gain control (“AGC”) circuits and corresponding methods that are especially well suited for use in motion encoding systems. Analog output signals provided by a motion encoder serve as inputs to the pulse generation circuit, where peaks, valleys and/or crosspoints corresponding to such analog signals are first detected and then employed to generate output pulses corresponding thereto. These output pulses are next provided to an AGC circuit as self-generated clock signals which control the time windows over which the analog signals of the motion encoder are sampled and processed by the AGC circuit so as to adjust the gains applied to such analog signals.

Abstract: According to one embodiment, there is provided a device and method for correcting code wheel misalignment which employs upper and lower code wheel misalignment photodetectors positioned above and below at least first and second motion detection photodetectors. According to other embodiments, there are provided a device and method for automatically setting the gain of an output circuit in an optical encoder. Still further embodiments of optical encoders combine the code wheel misalignment and automatic gain control features of the invention.