Abstract: There is provided a light control circuit including a light detector, a frequency detector, an error amplifier, an NMOS driver and a light source. The frequency detector identifies a signal frequency according to detected voltage signals outputted by the light detector and generates a control signal accordingly. The NMOS driver changes a drive current of the light source according to an output of the error amplifier. The error amplifier changes a bandwidth thereof according to the control signal from the frequency detector to regulate a response time of the drive current of the light source.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.

Abstract: An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided a phase shifter circuit of an optical encoder that receives four signals generated from photodiodes. The phase shifter circuit includes four resistor strings each coupled to two of the four signals having a 90-degrees phase pitch. By taping out different numbers of signals at different tape-out nodes of each of the four resistor strings, the phase shifter circuit is adapted to output signals for different interpolation factors without changing the mask set.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers. two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: There is provided an optical encoder including a photodiode array and a code disk opposite to each other. The photodiode array includes at least three sets of position photodiodes and two index photodiodes arranged transversally. The two index photodiodes are adjacently arranged at the same side of the at least three sets of position photodiodes. A first set of position photodiodes and a last set of position photodiodes of the at least three sets of position photodiodes are partially covered to alleviate the total harmonic distortion. The rest position photodiodes of the at least three sets of position photodiodes other than the first and last sets of position photodiodes are not covered.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: There is provided a light control circuit including a detected voltage generating circuit, a reference voltage generating circuit, an error amplifier, an NMOS driver and a light source. The detected voltage generating circuit outputs a detected voltage to a first input terminal of the error amplifier. The reference voltage generating circuit outputs a reference voltage to a second input terminal of the error amplifier. The NMOS driver changes a drive current of the light source according to an output of the error amplifier.

Abstract: An LED current regulator can regulate an LED current of an encoder system. The LED current regulator may comprise a first analog multiplier and a second analog multiplier. Each of the first and second analog multipliers may be configured to receive respective photodetector output signals, characterized by a peak-to-peak voltage, Vpp, and may be configured to generate respective first and second multiplier output signals. The first and second multiplier output signals may be combined to produce a first DC level, which may be representative of the peak-to-peak voltage, Vpp, of the photodetector output signals.

Abstract: Disclosed are various embodiments of circuitry and methods to compensate for variations in hysteresis associated with the comparators of an interpolation circuit in a single track optical encoder. Such variations in hysteresis may be minimized or eliminated by providing appropriately configured resistor ladder circuits to condition the inputs to the comparators, or by programming or trimming resistors in positive feedback loops of the comparators. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Abstract: An offset correction system for correcting signal offset of an encoder. The offset correction system may include a light emitter, an encoder disk, a reticle, a light detector; an offset detection circuit and an offset correction circuit. The offset detection circuit may comprise a comparator and an offset detector configured to receive sinusoidal output signals from the light detector and a reference signal to create digital pulses for determining the signal offset. The offset correction circuit may be configured to apply a gain to correct the offset output signal. The offset correction may be implemented in real time mode.

Abstract: An LED current regulator can regulate an LED current of an encoder system. The LED current regulator may comprise a first analog multiplier and a second analog multiplier. Each of the first and second analog multipliers may be configured to receive respective photodetector output signals, characterized by a peak-to-peak voltage, Vpp, and may be configured to generate respective first and second multiplier output signals. The first and second multiplier output signals may be combined to produce a first DC level, which may be representative of the peak-to-peak voltage, Vpp, of the photodetector output signals.

Abstract: An offset correction system for correcting signal offset of an encoder. The offset correction system may include a light emitter, an encoder disk, a reticle, a light detector; an offset detection circuit and an offset correction circuit. The offset detection circuit may comprise a comparator and an offset detector configured to receive sinusoidal output signals from the light detector and a reference signal to create digital pulses for determining the signal offset. The offset correction circuit may be configured to apply a gain to correct the offset output signal. The offset correction may be implemented in real time mode.

Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring current amplifiers disposed in the signal generating circuit thereof. Voltage amplifiers and their associated feedback resistors are eliminated in the various embodiments disclosed herein, resulting in decreased die size and improved encoder signal accuracy and performance, especially at high speeds The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.