Abstract: An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0,1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

Abstract: A multi-channel audio system that can provide a variable sub-sample delay between two or more audio channels. In one embodiment, a variable timing clock generator generates multiple clock signals where each may have different phase, and the clock generator can vary the phase difference, in accordance with a sub-sample delay setting input. These clock signals are used by respective digital-to-analog converters (DACs) to convert the digital audio channels into analog form. In another embodiment, a variable delay block is added to an oversampling DAC, on a per channel basis. Other embodiments are also described and claimed.

Abstract: The disclosed embodiments provide a system that facilitates synchronization between a first component and a second component connected to the first component via an interface in a computer system. During an active state of the interface, the system uses a local time base in the second component to generate a local clock signal that tracks a host clock signal from the first component. Next, during an inactive state of the interface, the system uses the local time base to maintain the local clock signal at the second component. Finally, during a subsequent active state of the interface after the inactive state, the system adjusts the local clock signal to remove clock drift between the local clock signal and the host clock signal.

Abstract: Audio jack optical modules that may have a reduced size. Various examples may provide an optical module for an audio jack where a driver circuit is omitted from the optical module and instead placed either elsewhere in the audio jack or separately outside the audio jack. In some examples, the driver may be integrated with a logic circuit, such as a coder-decoder (CODEC) or other logic circuit. Other examples may provide an optical module for an audio jack where a lens for a light-emitting diode is omitted. In some examples, a higher-power light-emitting diode may be used. These light-emitting diodes may be strong enough to provide a requisite amount of light to a detector in, or associated with, an audio plug.

Abstract: A system for verifying clock synchronization between master and slave network equipment is provided. The master includes a transmitter, first control logic, and a first processor. The slave includes a receiver, second control logic, and a second processor. The transmitter may send synchronization packets to the receiver. When a synchronization packet is sent, the first control logic forwards a first timestamp sample to the first processor. In response to receiving a synchronization packet, the receiver may generate a second timestamp sample that is forwarded to the second processor. When a number of first timestamp samples are collected at the first processor, the transmitter may send a timestamp packet to the receiver. In response to receiving the timestamp packet, the receiver may compare the first and second timestamp samples in an effort to synchronize a slave reference clock in the slave to a master reference clock in the master.

Abstract: Methods and apparatus for efficiently transporting data through network tunnels. In one embodiment, a tunneled device advertises certain capabilities to peer devices of a network, and discovers capabilities of peer devices of the network. In a second embodiment, each device of a tunneled network derives a network parameter from a transit protocol parameter for use in data networking.

Abstract: Methods and apparatus for efficiently servicing isochronous streams (such as media data streams) associated with a network. In one embodiment, an Isochronous Cycle Manager (ICM), receives multiple independent streams of packets that include isochronous packets arriving according to different time bases (e.g., where each stream has a different time base). The packets are sorted by the ICM into a buffering mechanism according to their required presentation time. Additionally the ICM calculates a launch time for each packet. The NIC transmits the packets from the queue according to an access scheme, such as a time division multiplexed (TDM) scheme where each of a plurality of cycles is subdivided into time slots. During appropriate time slots, the NIC transmits the packets in chronological order, as read out of the buffering mechanism.

Abstract: The disclosed embodiments provide a system that facilitates synchronization between a first component and a second component connected to the first component via an interface in a computer system. During an active state of the interface, the system uses a local time base in the second component to generate a local clock signal that tracks a host clock signal from the first component. Next, during an inactive state of the interface, the system uses the local time base to maintain the local clock signal at the second component. Finally, during a subsequent active state of the interface after the inactive state, the system adjusts the local clock signal to remove clock drift between the local clock signal and the host clock signal.

Abstract: A technique for extending battery life and reducing noise in a portable music player storing tracks on a hard drive reads a track from the disk to a buffer and plays the track from the buffer while the disk is spun down to a power-saving state. Noise and vibration is also reduced when the disk is spun down.

Abstract: A method of controlling the display period of video data, and system thereof, that matches the frame period of displayed video data to the speed of a color wheel. The period of the color wheel is measured to determine the display period. An optimum frame sequence pattern is selected, based on the display period, to minimize the artifacts created in the displayed image while maximizing the portion of the frame period used to display the image data. The display period for each segment of the frame sequence pattern is scaled to fit the period of the color wheel, and each bit of the image data is loaded into the spatial light modulator and displayed at the proper time.