Patents by Inventor Giulio DiGiacomo

Giulio DiGiacomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6678949
    Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: January 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Patent number: 6656770
    Abstract: Solder compositions are introduced to interface between an IC chip and its associated heat exchanger cover. The solder compositions have a solidus-liquidus temperature range that encompasses the IC chip operational temperature range. The solder composition has the desired property of absorbing and rejecting heat energy by changing state or phase with each temperature rise and decline that result from temperature fluctuations associated with the thermal cycles of the integrated circuit chips. The electronic module cover is a cap with a heat exchanger formed or attached as a single construction, and made of the same material as the substrate, or made with materials of compatible thermal coefficients of expansion to mitigate the effects of vertical displacement during thermal cycling.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Eugene R. Atwood, Joseph A. Benenati, Giulio DiGiacomo, Horatio Quinones
  • Patent number: 6373133
    Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: April 16, 2002
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron
  • Patent number: 6329721
    Abstract: A solder column structure particularly useful for joining electronic components by C-4 interconnection is provided comprising a solder column attached at one end to one of the substrates being joined and having a layer of indium at the other end. During reflow, to join the other substrate, the indium melts with part of the solder column forming a Pb—Sn—In ternary alloy joint having enhanced fatigue resistance. A method for using the solder column to make electronic component assemblies and electronic component assemblies made using the method and solder column are also provided.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: December 11, 2001
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Publication number: 20010037565
    Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Application
    Filed: June 21, 2001
    Publication date: November 8, 2001
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Publication number: 20010026957
    Abstract: Solder compositions are introduced to interface between an IC chip and its associated heat exchanger cover. The solder compositions have a solidus-liquidus temperature range that encompasses the IC chip operational temperature range. The solder composition has the desired property of absorbing and rejecting heat energy by changing state or phase with each temperature rise and decline that result from temperature fluctuations associated with the thermal cycles of the integrated circuit chips.
    Type: Application
    Filed: June 5, 2001
    Publication date: October 4, 2001
    Applicant: International Business Machines Corporation
    Inventors: Eugene R. Atwood, Joseph A. Benenati, Giulio DiGiacomo, Horatio Quinones
  • Patent number: 6281573
    Abstract: Solder compositions are introduced to interface between an IC chip and its associated heat exchanger cover. The solder compositions have a solidus-liquidus temperature range that encompasses the IC chip operational temperature range. The solder composition has the desired property of absorbing and rejecting heat energy by changing state or phase with each temperature rise and decline that result from temperature fluctuations associated with the thermal cycles of the integrated circuit chips. A path for high thermal conduction (low thermal resistance) from the IC chip to the heat exchanger to the ambient air is provided by an electronic module cover, configured as a cap with a heat exchanger formed or attached as a single construction, and made of the same material as the substrate, or made with materials of compatible thermal coefficients of expansion to mitigate the effects of vertical displacement during thermal cycling.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: August 28, 2001
    Assignee: International Business Machines Corporation
    Inventors: Eugene R. Atwood, Joseph A. Benenati, Giulio DiGiacomo, Horatio Quinones
  • Patent number: 6281452
    Abstract: A structure for mounting electronic devices which uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: August 28, 2001
    Assignee: International Business Machines Corporation
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Patent number: 6196443
    Abstract: A solder column structure particularly useful for joining electronic components by C-4 interconnection is provided comprising a solder column attached at one end to one of the substrates being joined and having a layer of indium at the other end. During reflow, to join the other substrate, the indium melts with part of the solder column forming a Pb—Sn—In ternary alloy joint having enhanced fatigue resistance. A method for using the solder column to make electronic component assemblies and electronic component assemblies made using the method and solder column are also provided.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: March 6, 2001
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 6085831
    Abstract: An apparatus for and method of cooling an electronic module comprising a heat sink enclosure placed directly over a chip or substrate in a flip chip package. The heat sink enclosure has a plurality of cooling fins extending from within the cavity of the enclosure. A liquid sealed inside the enclosure is trapped within a thermal transfer means, preferably a metal wick, which sits directly on a chip or substrate. As the chip or substrate heats up, heat is transferred to the thermal transfer means which in turn heats the liquid to its heat of vaporization. The vapors of the liquid rise and condense on the cooling fins and the heat is absorbed by the enclosure and conducted to an outside surface of the enclosure and dissipated. Cooling fins on an exterior surface of the enclosure further reduces the thermal resistance to enhance cooling.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: July 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Sushumna Iruvanti, David J. Womac
  • Patent number: 6025649
    Abstract: A solder column structure particularly useful for joining electronic components by C-4 interconnection is provided comprising a solder column attached at one end to one of the substrates being joined and having a layer of indium at the other end. During reflow, to join the other substrate, the indium melts with part of the solder column forming a Pb--Sn--In ternary alloy joint having enhanced fatigue resistance. A method for using the solder column to make electronic component assemblies and electronic component assemblies made using the method and solder column are also provided.
    Type: Grant
    Filed: July 22, 1997
    Date of Patent: February 15, 2000
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 5981310
    Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: November 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron
  • Patent number: 5950907
    Abstract: An enhanced fatigue life solder comprising, by weight, about 1-3% tin, about 1-3% silver and the balance essentially lead is provided. The solder is particularly useful for joining electronic components and in particular for making C-4 interconnections. A method for using the solder to make electronic components and electric components made using the method are also provided.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: September 14, 1999
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 5831336
    Abstract: An enhanced fatigue life solder comprising, by weight, about 1-3% tin, about 1-3% silver and the balance essentially lead is provided. The solder is particularly useful for joining electronic components and in particular for making C-4 interconnections. A method for using the solder to make electronic components and electric components made using the method are also provided.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: November 3, 1998
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 5539186
    Abstract: A multi-layer module that has incorporated therein an additional sheet with a heat generating film resistor formed thereon. A temperature responsive controller regulates the film resistor current in order to regulate the temperature at the surface of the module. The invention is applicable to both single chip and multiple chip modules, and for multi-chip modules a plurality of discrete film resistors on a single may be used.
    Type: Grant
    Filed: December 9, 1992
    Date of Patent: July 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Abrami, Maurizio Arienzo, Giulio DiGiacomo, Gene J. Gaudenzi, Paul V. McLaughlin
  • Patent number: 5442239
    Abstract: This invention relates generally to structure and method for corrosion- and stress-resistant interconnecting metallurgy, and more specifically to new structures and methods for corrosion- and stress-resistant interconnecting multilayer metallurgical pad comprising sequentially deposited layers of chromium, nickel and noble or relatively noble metal as the interconnecting metallurgy, or multilayer metallurgical pad comprising sequentially deposited layers of chromium, soluble noble metal, nickel and noble or relatively noble metal as the interconnecting metallurgy. This invention also relates to an improved multilayer metallurgical pad or metallurgical structure for mating at least a portion of a pin or a connector or a wire to a substrate.
    Type: Grant
    Filed: October 1, 1992
    Date of Patent: August 15, 1995
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Armando S. Cammarano, Nunzio DiPaolo
  • Patent number: 5420073
    Abstract: This invention relates generally to structure and method for preventing metal diffusion between a noble metal layer and an adjoining non-noble metal layer, and more specifically to new structures and methods for providing a superbarrier structure between copper and an adjoining noble metal layer. This is achieved by sequentially deposited a layer of non-noble metal, a layer of titanium, a layer of molybdenum, and a layer of noble or relatively less noble metal as the interconnecting metallurgy. This invention also relates to an improved multilayer metallurgical pad or metallurgical structure for mating at least a portion of a pin or a connector or a wire to a substrate.
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: May 30, 1995
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Jung-Ihl Kim, Chandrasekhar Narayan, Sampath Purushothaman
  • Patent number: 5367195
    Abstract: This invention relates generally to structure and method for preventing metal diffusion between a noble metal layer and an adjoining non-noble metal layer, and more specifically to new structures and methods for providing a superbarrier structure between copper and an adjoining noble metal layer. This is achieved by sequentially deposited a layer of non-noble metal, a layer of titanium, a layer of molybdenum, and a layer of noble or relatively less noble metal as the interconnecting metallurgy. This invention also relates to an improved multilayer metallurgical pad or metallurgical structure for mating at least a portion of a pin or a connector or a wire to a substrate.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: November 22, 1994
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Jung-Ihl Kim, Chandrasekhar Narayan, Sampath Purushothaman
  • Patent number: 5266522
    Abstract: This invention relates generally to structure and method for corrosion- and stress-resistant interconnecting metallurgy, and more specifically to new structures and methods for corrosion- and stress-resistant interconnecting multilayer metallurgical pad comprising sequentially deposited layers of chromium, nickel and noble or relatively noble metal as the interconnecting metallurgy, or multilayer metallurgical pad comprising sequentially deposited layers of chromium, soluble noble metal, nickel and noble or relatively noble metal as the interconnecting metallurgy. This invention also relates to an improved multilayer metallurgical pad or metallurgical structure for mating at least a portion of a pin or a connector or a wire to a substrate.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Giulio DiGiacomo, Armando S. Cammarano, Nunzio DiPaolo
  • Patent number: 5192622
    Abstract: A ternary-alloy/glass composite suitable for use in vias in glass-ceramic electronic structures includes gold, palladium, and either platinum or silver in the alloy where the gold is less than 50% by weight of the alloy. The alloy is combined with glass frit where the glass is present as 5-50% by volume in the composition. The ternary-alloy glass composite is sintered in the glass-ceramic structure and provides a hermetic seal. Chips and pins can be bonded directly to the ternary-alloy/glass composite using a eutectic braze without causing cracks in the glass-ceramic. The ternary-alloy/glass composite has good adhesion with glass-ceramics and is useful in vias in electronic structures.
    Type: Grant
    Filed: August 9, 1991
    Date of Patent: March 9, 1993
    Assignee: International Business Machines Corporation
    Inventors: Armando S. Cammarano, Giulio DiGiacomo, Nunzio DiPaolo