Patents by Inventor Giuseppe Palmisano

Giuseppe Palmisano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10237725
    Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls a variable attenuation resistance applied to a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of an amplitude of the modulated radiofrequency signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The value of the variable resistance is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: March 19, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ranieri Guerra, Roberto Larosa, Giuseppe Palmisano
  • Patent number: 10193581
    Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: January 29, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Spina, Alessandro Parisi, Pierpaolo Lombardo, Nunzio Greco, Giuseppe Palmisano
  • Publication number: 20180282379
    Abstract: The present invention relates to glycosylated YghJ poly-peptides from or derived from enterotoxigenic Escherichia coli (ETEC) that are immunogenic. In particular, the present invention relates to compositions or vaccines comprising the polypeptides and their application in immunization, vaccination, treatment and diagnosis of ETEC.
    Type: Application
    Filed: October 6, 2016
    Publication date: October 4, 2018
    Inventors: Anders Boysen, Jakob Møller-Jensen, Giuseppe Palmisano, Martin Røssel Larsen
  • Patent number: 10044290
    Abstract: An energy harvester circuit operates to harvest energy in battery-less electrical apparatus. The circuit includes a string of capacitors coupled to a circuit input to receive energy to be harvested. A string of transistors are coupled as pumping transistors to respective ones of the capacitors in the string of capacitors. A compensation coupling circuit is coupled between each transistor in the string of pumping transistors and one of a subsequent or a preceding transistor in the string of pumping transistors.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: August 7, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Finocchiaro, Giuseppe Palmisano
  • Publication number: 20180198372
    Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
    Type: Application
    Filed: March 7, 2018
    Publication date: July 12, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Spina, Pierpaolo Lombardo, Nunzio Greco, Alessandro Parisi, Giuseppe Palmisano
  • Patent number: 9978511
    Abstract: A galvanic isolation system includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: May 22, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nunzio Spina, Egidio Ragonese, Giuseppe Palmisano, Nunzio Greco
  • Patent number: 9948193
    Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 17, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Spina, Pierpaolo Lombardo, Nunzio Greco, Alessandro Parisi, Giuseppe Palmisano
  • Publication number: 20180062678
    Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.
    Type: Application
    Filed: March 24, 2017
    Publication date: March 1, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Spina, Alessandro Parisi, Pierpaolo Lombardo, Nunzio Greco, Giuseppe Palmisano
  • Publication number: 20180035283
    Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls a variable attenuation resistance applied to a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of an amplitude of the modulated radiofrequency signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The value of the variable resistance is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Ranieri Guerra, Roberto Larosa, Giuseppe Palmisano
  • Publication number: 20170358993
    Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 14, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Spina, Pierpaolo Lombardo, Nunzio Greco, Alessandro Parisi, Giuseppe Palmisano
  • Patent number: 9820141
    Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls an amplitude of a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of a baseband signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The amplitude of the modulated radiofrequency signal is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation. A switching circuit operates to selectively short circuit a resistive component of the RC network during receiver start-up.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: November 14, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ranieri Guerra, Roberto Larosa, Giuseppe Palmisano
  • Publication number: 20170288568
    Abstract: A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a.c. signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with their current paths cascaded, with a second intermediate point in-between. Each of the pairs of transistors includes a first transistor with a control terminal coupled to one of the two opposite nodes and a second transistor with a control terminal coupled to the other of the two opposite nodes. The bulks of the transistors receive voltages in order to vary the transistor threshold voltage by bringing the threshold voltage to a first value during forward conduction and to a second value during reverse conduction.
    Type: Application
    Filed: November 22, 2016
    Publication date: October 5, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Leandro Grasso, Ranieri Guerra, Giuseppe Palmisano
  • Publication number: 20170265062
    Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls an amplitude of a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of a baseband signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The amplitude of the modulated radiofrequency signal is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation. A switching circuit operates to selectively short circuit a resistive component of the RC network during receiver start-up.
    Type: Application
    Filed: September 29, 2016
    Publication date: September 14, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Ranieri Guerra, Roberto Larosa, Giuseppe Palmisano
  • Patent number: 9673754
    Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: June 6, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Vincenzo Fiore, Nunzio Spina, Giuseppe Palmisano
  • Publication number: 20170154727
    Abstract: A galvanic isolation system includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network.
    Type: Application
    Filed: May 24, 2016
    Publication date: June 1, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Nunzio Spina, Egidio Ragonese, Giuseppe Palmisano, Nunzio Greco
  • Publication number: 20170133945
    Abstract: An energy harvester circuit operates to harvest energy in battery-less electrical apparatus. The circuit includes a string of capacitors coupled to a circuit input to receive energy to be harvested. A string of transistors are coupled as pumping transistors to respective ones of the capacitors in the string of capacitors. A compensation coupling circuit is coupled between each transistor in the string of pumping transistors and one of a subsequent or a preceding transistor in the string of pumping transistors.
    Type: Application
    Filed: May 20, 2016
    Publication date: May 11, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro Finocchiaro, Giuseppe Palmisano
  • Publication number: 20170070354
    Abstract: Power and data are transmitted via a transformer including primary side and secondary side. A primary side signal is generated by coupling a first oscillator signal modulated with a data signal with a second oscillator signal that is selectively switched on and off. At the secondary side a secondary signal is generated. A demodulator demodulates the secondary signal to recover the data signal. A rectifier processes the secondary signal to recover a power supply signal controlled by switching on and off the second oscillator.
    Type: Application
    Filed: April 26, 2016
    Publication date: March 9, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Nunzio Greco, Giuseppe Palmisano
  • Patent number: 9520828
    Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: December 13, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Vincenzo Fiore, Nunzio Spina, Giuseppe Palmisano
  • Patent number: 9479208
    Abstract: A system for correction of the phase error in in-phase and quadrature signals may include a first signal and a second signal. The system includes a first circuit and a second circuit, each circuit configured for receiving a square-wave input signal and supplying a respective square-wave output signal. The output signal is delayed with respect to the input signal and each circuit is configured in such a way that the propagation delay of a rising edge and the propagation delay of a falling edge between the input signal and the output signal are configurable. The first circuit is configured for receiving the first signal, and the second circuit is configured for receiving the second signal.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: October 25, 2016
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Giuseppe Papotto, Giuseppe Palmisano
  • Patent number: 9438463
    Abstract: A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: September 6, 2016
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Leandro Grasso, Ranieri Guerra, Giuseppe Palmisano