Abstract: An oscillator is coupled to a first side of a galvanic barrier for supplying thereto an electric supply signal. The oscillator is configured to be alternatively turned on and off as a function of a PWM drive signal applied thereto. A receiver circuit coupled to the galvanic barrier receives therefrom a PWM power control signal. A signal reconstruction circuit coupled between the receiver circuit block and the oscillator provides to the oscillator a PWM drive signal reconstructed from the PWM power control signal. The signal reconstruction circuit includes a PLL circuit coupled to the receiver circuit block and configured to lock to the PWM control signal from the receiver circuit block. A PLL loop within the PLL circuit is sensitive to the PWM drive signal applied to the oscillator. The PLL loop is configured to be opened as a result of the power supply oscillator being turned off.

Abstract: A voltage reference circuit includes a first circuit block configured to generate a proportional to absolute temperature current, the first circuit block comprising a current mirror amplifier, a second circuit block coupled to the first circuit block and configured to generated a complimentary to absolute temperature current, and a third circuit block coupled to both the first circuit block and the second circuit block. The second circuit block includes a multi-stage common-source amplifier. The third circuit block is configured to combine the proportional to absolute temperature current and the complimentary to absolute temperature current to generate a reference voltage at an output of the voltage reference circuit.

Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.

Abstract: A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.

Abstract: A DC-DC converter includes a transformer having primary and secondary windings, a power oscillator applying an oscillating signal to the primary winding to transmit a power signal to the secondary winding, a rectifier obtaining an output DC voltage by rectifying the power signal at the secondary winding, and comparison circuitry generating an error signal representing a difference between the output DC voltage and a reference voltage value. A transmitter connected to the secondary winding performs an amplitude modulation of the power signal at the secondary winding to transmit an amplitude modulated power signal to the primary winding, the amplitude modulation based upon the error signal and modulating a stream of data to the primary winding. A receiver coupled to the primary winding demodulates the amplitude modulated power signal to recover the error signal and the stream of data. An amplitude of the oscillating signal is controlled by the error signal.

Abstract: The present invention relates to glycosylated YghJ polypeptides from or derived from enterotoxigenic Escherichia coli (ETEC) that are immunogenic. In particular, the present invention relates to compositions or vaccines comprising the polypeptides and their application in immunization, vaccination, treatment and diagnosis of ETEC.

Abstract: A DC-DC converter includes a power oscillator connected to a first transformer winding, and a channel conveying a data stream through galvanic isolation by power signal modulation. A rectifier rectifies the power signal to produce a DC voltage. A comparator produces an error signal from the DC voltage and a reference voltage. An analog-to-digital converter converts the error signal to a digital power control value. A multiplexer multiplexes the digital power control value with the data stream to obtain a multiplexed bitstream. A transmitter driven by the multiplexed bitstream performs amplitude modulation of the power signal at a second transformer winding. A receiver connected to the first winding demodulates the amplitude modulated power signal. A demultiplexer demultiplexes the data stream and the digital power control value. A digital-to-analog converter converts the digital power control value to an analog control signal for the power oscillator.

Abstract: The present invention relates to glycosylated YghJ polypeptides from or derived from enterotoxigenic Escherichia coli (ETEC) that are immunogenic. In particular, the present invention relates to compositions or vaccines comprising the polypeptides and their application in immunization, vaccination, treatment and diagnosis of ETEC.

Abstract: An oscillator is coupled to a first side of a galvanic barrier for supplying thereto an electric supply signal. The oscillator is configured to be alternatively turned on and off as a function of a PWM drive signal applied thereto. A receiver circuit coupled to the galvanic barrier receives therefrom a PWM power control signal. A signal reconstruction circuit coupled between the receiver circuit block and the oscillator provides to the oscillator a PWM drive signal reconstructed from the PWM power control signal. The signal reconstruction circuit includes a PLL circuit coupled to the receiver circuit block and configured to lock to the PWM control signal from the receiver circuit block. A PLL loop within the PLL circuit is sensitive to the PWM drive signal applied to the oscillator. The PLL loop is configured to be opened as a result of the power supply oscillator being turned off.

Abstract: A DC-DC converter includes a power oscillator connected to a first transformer winding, and a channel conveying a data stream through galvanic isolation by power signal modulation. A rectifier rectifies the power signal to produce a DC voltage. A comparator produces an error signal from the DC voltage and a reference voltage. An analog-to-digital converter converts the error signal to a digital power control value. A multiplexer multiplexes the digital power control value with the data stream to obtain a multiplexed bitstream. A transmitter driven by the multiplexed bitstream performs amplitude modulation of the power signal at a second transformer winding. A receiver connected to the first winding demodulates the amplitude modulated power signal. A demultiplexer demultiplexes the data stream and the digital power control value. A digital-to-analog converter converts the digital power control value to an analog control signal for the power oscillator.

Abstract: A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a.c. signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with their current paths cascaded, with a second intermediate point in-between. Each of the pairs of transistors includes a first transistor with a control terminal coupled to one of the two opposite nodes and a second transistor with a control terminal coupled to the other of the two opposite nodes. The bulks of the transistors receive voltages in order to vary the transistor threshold voltage by bringing the threshold voltage to a first value during forward conduction and to a second value during reverse conduction.

Abstract: Power and data are transmitted via a transformer including primary side and secondary side. A primary side signal is generated by coupling a first oscillator signal modulated with a data signal with a second oscillator signal that is selectively switched on and off. At the secondary side a secondary signal is generated. A demodulator demodulates the secondary signal to recover the data signal. A rectifier processes the secondary signal to recover a power supply signal controlled by switching on and off the second oscillator.

Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls a variable attenuation resistance applied to a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of an amplitude of the modulated radiofrequency signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The value of the variable resistance is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation.

Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.

Abstract: The present invention relates to glycosylated YghJ poly-peptides from or derived from enterotoxigenic Escherichia coli (ETEC) that are immunogenic. In particular, the present invention relates to compositions or vaccines comprising the polypeptides and their application in immunization, vaccination, treatment and diagnosis of ETEC.

Abstract: An energy harvester circuit operates to harvest energy in battery-less electrical apparatus. The circuit includes a string of capacitors coupled to a circuit input to receive energy to be harvested. A string of transistors are coupled as pumping transistors to respective ones of the capacitors in the string of capacitors. A compensation coupling circuit is coupled between each transistor in the string of pumping transistors and one of a subsequent or a preceding transistor in the string of pumping transistors.

Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.

Abstract: A galvanic isolation system includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network.

Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.

Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.