Patents by Inventor Glen Howard Handlogten
Glen Howard Handlogten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8196074Abstract: An apparatus, program product and method utilize heuristic clustering to generate assignments of circuit elements to clusters or groups to optimize a desired spatial locality metric. For example, circuit elements such as scan-enabled latches may be assigned to individual scan chains using heuristic clustering to optimize the layout of the scan chains in a scan architecture for a circuit design.Type: GrantFiled: March 18, 2009Date of Patent: June 5, 2012Assignee: International Business Machines CorporationInventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
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Patent number: 7929548Abstract: A data communication apparatus includes a plurality of output ports and a scheduler for assigning priorities for outbound data frames. The scheduler includes one or more scheduling queues. Each scheduling queue indicates an order in which data flows are to be serviced. At least one scheduling queue has a respective plurality of output ports assigned to the scheduling queue. That is, the scheduling queue is shared by two or more output ports.Type: GrantFiled: January 7, 2008Date of Patent: April 19, 2011Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7680043Abstract: In a first aspect, a network processor services a plurality of flows including a first flow and a discard flow. The first flow includes a first flow queue and the discard flow includes a discard queue that lists frames to be discarded. An indication is made that the first flow is to be disabled. In response to the indication, all frames included in the first flow queue are transferred to the discard queue. Because the first flow queue is now empty, reconfiguration of the first flow may proceed immediately.Type: GrantFiled: March 20, 2002Date of Patent: March 16, 2010Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7660251Abstract: A method and apparatus are provided for implementing hierarchical scheduling of oversubscribed virtual paths with underutilized bandwidth that works for both ATM (cell) and IP (frame) scheduling. A scheduler includes a first calendar for pipes and autonomous flows and a second calendar for pipe flows. A winner of a pipe or an autonomous flow is identified from the first calendar. Responsive to an identified winner pipe, a pipe queue is checked for an associated pipe flow for the winner pipe. Responsive to identifying an empty pipe queue for the winner pipe, a pipe win credit is assigned to the pipe without reattaching the winner pipe to the first calendar. Then a next winner is identified from the first calendar. When a winner pipe flow is identified from the second calendar and the pipe win credit is assigned to the pipe for the winner pipe flow, then the winner pipe flow is serviced without delay.Type: GrantFiled: March 9, 2008Date of Patent: February 9, 2010Assignee: International Business Machines CorporationInventors: Lyle Edwin Grosbach, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Publication number: 20090178014Abstract: An apparatus, program product and method utilize heuristic clustering to generate assignments of circuit elements to clusters or groups to optimize a desired spatial locality metric. For example, circuit elements such as scan-enabled latches may be assigned to individual scan chains using heuristic clustering to optimize the layout of the scan chains in a scan architecture for a circuit design.Type: ApplicationFiled: March 18, 2009Publication date: July 9, 2009Applicant: International Business Machines CorporationInventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
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Patent number: 7543204Abstract: Methods, apparatus, and computer program product are provided for designing logic scan chains for matching gated portions of a clock tree. A clock tree includes a plurality of sections, each section including a gate receiving inputs of a global clock and a chain-specific clock control signal for a particular scan chain. A plurality of scan chains is defined, each including a plurality of latches. Each scan chain latch is connected to a corresponding chain-specific clock tree section.Type: GrantFiled: July 28, 2005Date of Patent: June 2, 2009Assignee: International Business Machines CorporationInventors: Mark S. Fredrickson, Glen Howard Handlogten, Steven Paul Jones, Chad B. McBride
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Patent number: 7509611Abstract: An apparatus, program product and method utilize heuristic clustering to generate assignments of circuit elements to clusters or groups to optimize a desired spatial locality metric. For example, circuit elements such as scan-enabled latches may be assigned to individual scan chains using heuristic clustering to optimize the layout of the scan chains in a scan architecture for a circuit design.Type: GrantFiled: February 7, 2006Date of Patent: March 24, 2009Assignee: International Business Machines CorporationInventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
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Patent number: 7398505Abstract: An apparatus, program product and method automatically back annotate a functional definition of a circuit design based upon the physical layout generated from the functional definition. A circuit design may be back annotated, for example, by generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design using a physical definition of the circuit design that has been generated from the functional definition, and modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition.Type: GrantFiled: February 7, 2006Date of Patent: July 8, 2008Assignee: International Business Machines CorporationInventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
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Publication number: 20080159297Abstract: A method and apparatus are provided for implementing hierarchical scheduling of oversubscribed virtual paths with underutilized bandwidth that works for both ATM (cell) and IP (frame) scheduling. A scheduler includes a first calendar for pipes and autonomous flows and a second calendar for pipe flows. A winner of a pipe or an autonomous flow is identified from the first calendar. Responsive to an identified winner pipe, a pipe queue is checked for an associated pipe flow for the winner pipe. Responsive to identifying an empty pipe queue for the winner pipe, a pipe win credit is assigned to the pipe without reattaching the winner pipe to the first calendar. Then a next winner is identified from the first calendar. When a winner pipe flow is identified from the second calendar and the pipe win credit is assigned to the pipe for the winner pipe flow, then the winner pipe flow is serviced without delay.Type: ApplicationFiled: March 9, 2008Publication date: July 3, 2008Applicant: International Business Machines CorporationInventors: Lyle Edwin Grosbach, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Publication number: 20080141210Abstract: An apparatus and program product automatically back annotate a functional definition of a circuit design based upon the physical layout generated from the functional definition. A circuit design may be back annotated, for example, by generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design using a physical definition of the circuit design that has been generated from the functional definition, and modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition.Type: ApplicationFiled: February 15, 2008Publication date: June 12, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPROATIONInventors: Mark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride
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Patent number: 7362706Abstract: A method and apparatus are provided for implementing hierarchical scheduling of oversubscribed virtual paths with underutilized bandwidth that works for both ATM (cell) and IP (frame) scheduling. A scheduler includes a first calendar for pipes and autonomous flows and a second calendar for pipe flows. A winner of a pipe or an autonomous flow is identified from the first calendar. Responsive to an identified winner pipe, a pipe queue is checked for an associated pipe flow for the winner pipe. Responsive to identifying an empty pipe queue for the winner pipe, a pipe win credit is assigned to the pipe without reattaching the winner pipe to the first calendar. Then a next winner is identified from the first calendar. When a winner pipe flow is identified from the second calendar and the pipe win credit is assigned to the pipe for the winner pipe flow, then the winner pipe flow is serviced without delay.Type: GrantFiled: December 12, 2002Date of Patent: April 22, 2008Assignee: International Business Machines CorporationInventors: Lyle Edwin Grosbach, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7317683Abstract: A data communication apparatus includes a plurality of output ports and a scheduler for assigning priorities for outbound data frames. The scheduler includes one or more scheduling queues. Each scheduling queue indicates an order in which data flows are to be serviced. At least one scheduling queue has a respective plurality of output ports assigned to the scheduling queue. That is, the scheduling queue is shared by two or more output ports.Type: GrantFiled: November 1, 2001Date of Patent: January 8, 2008Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7310345Abstract: A scheduler for a network processor includes one or more scheduling queues. Each scheduling queue defines a respective sequence in which flows are to be serviced. A respective empty indicator is associated with each scheduling queue to indicate whether the respective scheduling queue is empty. By referring to the empty indicators, it is possible to avoid wasting operating cycles of the scheduler on searching scheduling queues that are empty.Type: GrantFiled: November 1, 2001Date of Patent: December 18, 2007Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard, Daniel James Sucher
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Patent number: 7280474Abstract: A scheduler for a network processor includes a scheduling queue in which weighted fair queuing is applied. The scheduling queue has a range R. Flows are attached to the scheduling queue at a distance D from a current pointer for the scheduling queue. The distance D is calculated for each flow according to the formula D=((WF×FS)/SF), where WF is a weighting factor applicable to a respective flow; FS is a frame size attributable to the respective flow; and SF is a scaling factor. The scaling factor SF is adjusted depending on a comparison of the distance D to the range R.Type: GrantFiled: November 1, 2001Date of Patent: October 9, 2007Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7257124Abstract: In a first aspect, a network processor includes a scheduler in which a scheduling queue is maintained. A last frame is dispatched from a flow queue maintained in the network processor, thereby emptying the flow queue. Data indicative of the size of the dispatched last frame is stored in association with the scheduler. A new frame corresponding to the emptied flow queue is received, and the flow corresponding to the emptied flow queue is attached to the scheduling queue. The flow is attached to the scheduling queue at a distance D from a current pointer for the scheduling queue. The distance D is determined based at least in part on the stored data indicative of the size of the dispatched last frame.Type: GrantFiled: March 20, 2002Date of Patent: August 14, 2007Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7231479Abstract: A method and apparatus are provided for efficiently operating a round robin arbitration system in a given computer system. The system utilizes a series of banks of requestors and pointer. The banks of requestors and pointers operate on sequential AND-OR-Inverter/OR-AND-Inverter (AOI/OAI) logic to advance the pointer and efficiently select those requestors with pending requests. The use of the AOI/OAI logic circuitry in the banks of requestors and pointers allows for efficient selection and minimization of complex circuitry reducing the overall circuit area.Type: GrantFiled: December 17, 2003Date of Patent: June 12, 2007Assignee: International Business Machines CorporationInventors: Glen Howard Handlogten, Peichun Peter Liu, Jieming Qi
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Patent number: 7187684Abstract: A scheduler for a network processor includes a scheduling queue in which weighted fair queuing is applied to define a sequence in which flows are to be serviced. The scheduling queue includes at least a first subqueue and a second subqueue. The first subqueue has a first range and a first resolution, and the second subqueue has an extended range that is greater than the first range and a lower resolution that is less than the first resolution. Flows that are to be enqueued within the range of highest precision to the current pointer of the scheduling queue are attached to the first subqueue. Flows that are to be enqueued outside the range of highest precision from the current pointer of the scheduling queue are attached to the second subqueue. Numerous other aspects are provided.Type: GrantFiled: November 1, 2001Date of Patent: March 6, 2007Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7130270Abstract: In a scheduler circuit for a network processor, bandwidth assigned to a virtual path is allocated among virtual channels associated with the virtual path. The allocation of bandwidth among the virtual channels is varied dynamically as virtual channels become active or inactive.Type: GrantFiled: July 26, 2002Date of Patent: October 31, 2006Assignee: International Business Machines CorporationInventors: Merwin Herscher Alferness, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7103051Abstract: A scheduler, scheduling method, and computer program product are provided for implementing Quality-of-Service (QoS) scheduling of a plurality of flows with aging time stamps. Subsets of time stamp data stored in a time stamp aging memory array are sequentially accessed. Each time stamp data subset contains time stamp data for a subplurality of flows. Guaranteed aging processing steps are performed for each flow utilizing the time stamp data subsets to identify and mark invalid calendar next time values. When a new frame arrival for an empty flow is identified, flow queue control block (FQCB) time stamp data and the flow time stamp data in the time stamp aging memory array are accessed. Based on the calendar to which the new frame is directed or the target calendar for the new frame, the target calendar next time valid bit of the time stamp aging memory array data is checked.Type: GrantFiled: November 1, 2001Date of Patent: September 5, 2006Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard
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Patent number: 7046676Abstract: A QoS scheduler, scheduling method, and computer program product are provided for implementing Quality-of-Service (QoS) scheduling with a cached status array. A plurality of calendars are provided for scheduling the flows. An active flow indicator is stored for each calendar entry in a calendar status array (CSA). A cache copy subset of the active flow indicators from the calendar status array (CSA) is stored in a cache. The calendar status array (CSA) is updated based upon a predefined calendar range and resolution. The cache copy subset of the active flow indicators from the calendar status array (CSA) is used to determine a given calendar for servicing.Type: GrantFiled: November 1, 2001Date of Patent: May 16, 2006Assignee: International Business Machines CorporationInventors: William John Goetzinger, Glen Howard Handlogten, James Francis Mikos, David Alan Norgaard