Patents by Inventor Gorou Ikegami

Gorou Ikegami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070194457
    Abstract: In a semiconductor package, a wiring board includes an insulating substrate, and a plurality of first electrode terminals formed on a surface thereof. A semiconductor chip includes a semiconductor substrate, and a plurality of second electrode terminals formed on a surface thereof, and is mounted on the wiring board so that the first electrode terminals are bonded to the second electrode terminals, respectively. A sealing layer is formed between the wiring board and the semiconductor chip so that the first electrode terminals and the second electrode terminals are sealed by the sealing layer, and so that the wiring board and the semiconductor chip are adhered to each other. The sealing s layer is derived from a liquid crystal polymer sheet intervened between the wiring board and the semiconductor chip.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 23, 2007
    Applicant: NEC ELECTRONICS COROPORATION
    Inventors: Gorou Ikegami, Shunichi Iwanaga
  • Patent number: 6794762
    Abstract: An electronic component, in which an electronic element 9 fixed onto a first electrically conductive film 7 is electrically connected to second electrically conductive films 8 arranged in substantially the same plane as that of the first electrically conductive film 7 and the electronic element 9 including peripheries of the first and second electrically conductive films 7 and 8 is covered by an encapsulation resin portion 11, has electrically conductive protrusions 13 formed on an exposed surface of the first and second electrically conductive films exposed from the encapsulation resin portion 11.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: September 21, 2004
    Assignee: NEC Electronics Corporation
    Inventors: Gorou Ikegami, Tomonobu Sugimoto
  • Patent number: 6674178
    Abstract: In a semiconductor device, a semiconductor pellet having bump electrodes and a interconnection board having pad electrodes are brought into mutual opposition with a resin containing a filler therebetween, so that the bump electrode and the pad electrodes are superposed. With the filler remaining at the superposed parts between the electrodes, the electrode superposed parts are hot-pressed, and the semiconductor pellet and interconnection board are adhered by the resin.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: January 6, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Gorou Ikegami
  • Patent number: 6670706
    Abstract: Parts of pad electrodes formed on an interconnection board so as to correspond to bump electrodes of a semiconductor pellet that neighbor parts superposed with the bump electrodes are caused to extend in substantially the same direction, and ultrasonic vibration is applied in this extension direction so as to make a connection between the pad electrodes and the bump electrodes.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: December 30, 2003
    Assignee: NEC Corporation
    Inventor: Gorou Ikegami
  • Patent number: 6653171
    Abstract: In a flip-chip type semiconductor device including a semiconductor chip having metal bumps on one surface thereof, an interposer substrate having pad electrodes on one surface thereof, and an under-fill resin layer filled into a gap between the semiconductor chip and the interposer substrate where the metal bumps are in contact with the pad electrodes, the under-fill resin layer has a number of split voids therein.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: November 25, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Gorou Ikegami
  • Patent number: 6617688
    Abstract: A semiconductor device has a first semiconductor pellet and a second semiconductor pellet. An electrode-forming surface of the first semiconductor pellet on which flat electrodes having flat surfaces are formed and an electrode-forming surface of the second semiconductor pellet on which protruded electrodes are opposed to each other. Also, the flat electrodes and the protruded electrodes are electrically connected to each other. A main component of a conductive material that forms the flat electrode is the same as a main component of a conductive material that forms the protruded electrode. Furthermore, the hardness of the protruded electrode is higher than the hardness of the flat electrode. Therefore, the protruded electrodes and the flat electrodes can be electrically connected to each other with high reliability.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: September 9, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Gorou Ikegami, Nobuaki Nagai
  • Publication number: 20030160339
    Abstract: An electronic component, in which an electronic element 9 fixed onto a first electrically conductive film 7 is electrically connected to second electrically conductive films 8 arranged in substantially the same plane as that of the first electrically conductive film 7 and the electronic element 9 including peripheries of the first and second electrically conductive films 7 and 8 is covered by an encapsulation resin portion 11, has electrically conductive protrusions 13 formed on an exposed surface of the first and second electrically conductive films exposed from the encapsulation resin portion 11.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 28, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Gorou Ikegami, Tomonobu Sugimoto
  • Patent number: 6608372
    Abstract: A surface mountable chip type semiconductor device comprises: first and second conductive land areas which are formed on an insulating substrate and which are electrically coupled with each other; a conductive post formed on the first conductive land area; and a semiconductor pellet which has electrodes on both sides thereof and which is mounted on the second conductive land area. A main area of the insulating substrate including the conductive post and the semiconductor pellet is encapsulated by encapsulation resin. Top portions of the conductive post and an external electrode electrically coupled to the semiconductor pellet are exposed from the encapsulation resin. Top surfaces of the conductive post and the external electrode are approximately coplanar with each other.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: August 19, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Gorou Ikegami
  • Publication number: 20030104184
    Abstract: A multiple mother board holding electronic components has frame-shaped reinforcing conductive films surrounding peripheries on both surfaces of the mother board. In the conductive films, plural minute openings are formed such that positions of the openings on both surfaces are shifted from each other.
    Type: Application
    Filed: November 26, 2002
    Publication date: June 5, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Taro Hirai, Shigekazu Hino, Gorou Ikegami, Yukitaka Tokumoto
  • Publication number: 20030058629
    Abstract: A wiring substrate for used in a small electronic component. The wiring substrate comprises: an insulating substrate; and a conductive land portion which is formed on a first surface of the insulating substrate and on which an electronic element is to be mounted via conductive adhesive to electrically couple an electrode of the electronic element with the conductive land portion. The thickness of the peripheral portion of the conductive land portion which surrounds the electronic element is thicker than that of the central portion of the conductive land portion. The insulating substrate may also have a conductive land portion which is formed on a second surface of the insulating substrate and which is electrically coupled with the conductive land portion formed on the first surface of the insulating substrate via a through hole penetrating through the insulating substrate.
    Type: Application
    Filed: September 24, 2002
    Publication date: March 27, 2003
    Inventors: Taro Hirai, Gorou Ikegami
  • Publication number: 20030036220
    Abstract: In a method for manufacturing a printed circuit board, openings are perforated in a first resin substrate. Then, a conductive layer is formed on a surface of the first resin substrate and within the openings of the first resin substrate. Then, a second resin substrate is adhered to the conductive layer by an adhesive layer. Then, the first resin substrate is peeled off from the conductive layer, so that the conductive layer is transferred from the first resin substrate to the second resin substrate.
    Type: Application
    Filed: July 25, 2002
    Publication date: February 20, 2003
    Inventors: Gorou Ikegami, Taro Hirai
  • Patent number: 6504240
    Abstract: A semiconductor device comprising a wiring substrate which has a laminated glass fabric body made by laminating a plurality of glass fabrics and impregnating with resin. A resin layer is provided on at least one of surfaces of the laminated glass fabric body. A plurality of pad electrodes are formed on the resin layer. The resin layer has a thickness from 1.5 to 2.5 times the depth of unevenness of the surface of the laminated glass fabric body on which the resin layer exists. A semiconductor pellet is disposed on the wiring substrate and has a plurality of projected electrodes. The projected electrodes are electrically coupled to the pad electrodes by pressing the projected electrodes to the pad electrodes while heating the wiring substrate and/or the semiconductor pellet. Tip portions of the projected electrodes together with the pad electrodes plunge into the resin layer.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: January 7, 2003
    Assignee: NEC Corporation
    Inventor: Gorou Ikegami
  • Publication number: 20020140066
    Abstract: A semiconductor device has a first semiconductor pellet and a second semiconductor pellet. An electrode-forming surface of the first semiconductor pellet on which flat electrodes having flat surfaces are formed and an electrode-forming surface of the second semiconductor pellet on which protruded electrodes are opposed to each other. Also, the flat electrodes and the protruded electrodes are electrically connected to each other. A main component of a conductive material that forms the flat electrode is the same as a main component of a conductive material that forms the protruded electrode. Furthermore, the hardness of the protruded electrode is higher than the hardness of the flat electrode. Therefore, the protruded electrodes and the flat electrodes can be electrically connected to each other with high reliability.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 3, 2002
    Applicant: FUJI PHOTO OPTICAL CO., LTD.
    Inventors: Gorou Ikegami, Nobuaki Nagai
  • Publication number: 20020117762
    Abstract: A surface mountable chip type semiconductor device comprises: first and second conductive land areas which are formed on an insulating substrate and which are electrically coupled with each other; a conductive post formed on the first conductive land area; and a semiconductor pellet which has electrodes on both sides thereof and which is mounted on the second conductive land area. A main area of the insulating substrate including the conductive post and the semiconductor pellet is encapsulated by encapsulation resin. Top portions of the conductive post and an external electrode electrically coupled to the semiconductor pellet are exposed from the encapsulation resin. Top surfaces of the conductive post and the external electrode are approximately coplanar with each other.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 29, 2002
    Inventor: Gorou Ikegami
  • Patent number: 6433426
    Abstract: There is provided a semiconductor device including a semiconductor pellet having a plurality of bump electrodes on a surface thereof, a wiring board having a plurality of pad electrodes on a surface thereof, each one of the pad electrodes being engaged to an associated one of the bump electrodes when the wiring board is coupled to the semiconductor pellet, and a resin layer sandwiched between the semiconductor pellet and the wiring board for connecting them with each other therethrough, each of the bump electrodes being formed with one of a projection and a recess into which the projection is able to be fit, and each of the pad electrodes being formed with the other. For instance, the bump electrodes are formed by compressing a molten ball formed at a tip end of a gold wire onto the semiconductor pellet, and the projection is formed on the bump electrodes by cutting the gold wire so that a tip end portion of the gold wire leaves on the bump electrodes.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: August 13, 2002
    Assignee: NEC Corporation
    Inventor: Gorou Ikegami
  • Publication number: 20020089057
    Abstract: Parts of pad electrodes formed on an interconnection board so as to correspond to bump electrodes of a semiconductor pellet that neighbor parts superposed with the bump electrodes are caused to extend in substantially the same direction, and ultrasonic vibration is applied in this extension direction so as to make a connection between the pad electrodes and the bump electrodes.
    Type: Application
    Filed: March 28, 2000
    Publication date: July 11, 2002
    Inventor: Gorou Ikegami
  • Patent number: 6406989
    Abstract: There is provided a semiconductor device including a semiconductor pellet having a plurality of bump electrodes on a surface thereof, a wiring board having a plurality of pad electrodes on a surface thereof, each one of the pad electrodes being engaged to an associated one of the bump electrodes when the wiring board is coupled to the semiconductor pellet, and a resin layer sandwiched between the semiconductor pellet and the wiring board for connecting them with each other therethrough, each of the bump electrodes being formed with one of a projection and a recess into which the projection is able to be fit, and each of the pad electrodes being formed with the other. For instance, the bump electrodes are formed by compressing a molten ball formed at a tip end of a gold wire onto the semiconductor pellet, and the projection is formed on the bump electrodes by cutting the gold wire so that a tip end portion of the gold wire leaves on the bump electrodes.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventor: Gorou Ikegami
  • Publication number: 20020048848
    Abstract: In a flip-chip type semiconductor device including a semiconductor chip having metal bumps on one surface thereof, an interposer substrate having pad electrodes on one surface thereof, and an under-fill resin layer filled into a gap between the semiconductor chip and the interposer substrate where the metal bumps are in contact with the pad electrodes, the under-fill resin layer has a number of split voids therein.
    Type: Application
    Filed: July 12, 2001
    Publication date: April 25, 2002
    Inventor: Gorou Ikegami
  • Publication number: 20020048905
    Abstract: A semiconductor chip has a plurality of front protruding electrodes and a plurality of rear film electrodes. The front electrodes are connected to interconnect lines made of a metallic film. The semiconductor chip is mounted on a printed circuit board by mounting the rear film electrodes on respective terminals of the printed circuit board and the metallic film is connected to other terminals of the printed circuit board by bonding wires. A large number of semiconductor chips can be fabricated in a simple process at a time.
    Type: Application
    Filed: August 24, 2001
    Publication date: April 25, 2002
    Inventors: Gorou Ikegami, Takao Miyoshi
  • Publication number: 20010026015
    Abstract: A method of manufacturing a semiconductor device having reliable electrical connections between projected electrodes of a semiconductor pellet and pad electrodes of a wiring substrate. In this method, the semiconductor pellet having a plurality of projected electrodes and the wiring substrate having a plurality of pad electrodes are prepared. Liquid resin material including inorganic filler dispersed therein is applied on the wiring substrate. The semiconductor pellet is opposed to the wiring substrate via the resin material, and the projected electrodes are superposed and pressed onto the pad electrodes. The projected electrodes and the pad electrodes are electrically coupled while vibrating the resin material in the proximity of the projected electrodes and excluding the inorganic filler from superposed interface portions between the projected electrodes and the pad electrodes.
    Type: Application
    Filed: March 26, 2001
    Publication date: October 4, 2001
    Applicant: NEC CORPORATION
    Inventors: Gorou Ikegami, Eita Iizuka, Hirofumi Horita