Patents by Inventor Graeme G. Mackay

Graeme G. Mackay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210367513
    Abstract: A method of randomizing inductor current in at least one of a plurality of parallel coupled peak valley current-controlled power converters may include comparing the inductor current to a threshold to generate a comparison signal, delaying the comparison signal by a plurality of delay amounts to generate a plurality of delayed versions of the comparison signal, and randomly selecting one of the plurality of delayed versions of the comparison signal for controlling the inductor current during one or both of a charging state and a transfer state of the at least one of the plurality of parallel coupled peak/valley current-controlled power converters.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme G. MACKAY, Jason W. LAWRENCE
  • Publication number: 20210367515
    Abstract: A system may include a power converter configured to receive an input voltage and generate an output voltage and a controller configured to control operation of the power converter based on a comparison of a current associated with the power converter to a threshold current and control the threshold current as a function of the input voltage.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme G. MACKAY, Jason W. LAWRENCE
  • Publication number: 20210364560
    Abstract: An apparatus may include a sense resistor comprising a plurality of parallel-coupled resistor elements, a plurality of positive voltage sense points, and a plurality of negative voltage sense points. A first passive combination network may be configured to combine the plurality of positive voltage sense points into a single positive sense terminal and a second passive combination network may be configured to combine the plurality of negative voltage sense points into a single negative sense terminal. The first passive combination network and the second passive combination network may be arranged such that a sense voltage is measurable between the single positive sense terminal and the single negative sense terminal and a dependence of the sense voltage on a variation in current density in the parallel-coupled resistor elements is minimized.
    Type: Application
    Filed: December 10, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Kathryn R. HOLLAND, Bo-Ren WANG, Ravi K. KUMMARAGUNTLA, Graeme G. MACKAY, Christian LARSEN
  • Publication number: 20210367514
    Abstract: A system may include a power converter configured to receive an input voltage and generate an output voltage and a controller configured to control operation of the power converter based on a comparison of the output voltage with at least one output voltage threshold and set the at least one output voltage threshold based on the input voltage.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jason W. LAWRENCE, Graeme G. MACKAY
  • Publication number: 20210367517
    Abstract: A system for controlling a current in a power converter configured to generate an output voltage may include a control loop having a plurality of comparators, each comparator having a respective reference voltage to which the output voltage is compared, a digital controller configured to calculate one or more pre-seeded control parameters for the current, and an analog state machine configured to, based on outputs of the plurality of comparators, select control parameters for controlling the current. The control parameters may be selected from the pre-seeded control parameters, control parameters for controlling the current to have a magnitude of zero, and control parameters for controlling the current to have a maximum magnitude.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jason W. LAWRENCE, Eric J. KING, Graeme G. MACKAY
  • Publication number: 20210367510
    Abstract: A system for controlling a current in a power converter may include an outer control loop configured to use an outer set of output voltage thresholds for an output voltage generated by the power converter in order to provide hysteretic control of the current, an inner control loop configured to use an inner set of output voltage thresholds for the output voltage in order to provide continuous control of the current, the inner control loop further configured to measure a time duration required for the output voltage to cross a single pair of two output voltage thresholds of the inner set of output voltage thresholds in order to determine an input-referred estimate of a current load of the power converter and set a peak current threshold and a valley current threshold for the current based on the input-referred estimate of the current load.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jason W. LAWRENCE, Eric J. KING, Graeme G. MACKAY, Theodore M. BURK
  • Patent number: 11183849
    Abstract: A power delivery system may include a power converter configured to electrically couple to a power source and further configured to supply electrical energy to one or more loads electrically coupled to an output of the power converter, and control circuitry configured to select a constraint factor from a plurality of different constraint factors based on at least one of an input voltage to the power converter and a power level available to the power converter, and control the power converter in accordance with the constraint factor.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: November 23, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme G. Mackay, Ajit Sharma, Jason W. Lawrence, Eric J. King
  • Patent number: 11031867
    Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal and generating the slope compensation signal to have a compensation value of approximately zero at an end of a duty cycle of operation of the switch-mode power supply.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: June 8, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Mikel Ash, Eric J. King, Lingli Zhang, Graeme G. Mackay
  • Publication number: 20210159798
    Abstract: A system may include a power converter configured to convert a source voltage from a power source to an output voltage at an output capacitor at an output of the power converter, a dual-mode power converter electrically coupled to the power converter, the dual-mode power converter having a plurality of switches and a power inductor, an energy storage element electrically coupled to the dual-mode power converter, and control circuity configured to, when the output voltage is below a threshold voltage magnitude, control the plurality of switches to operate the dual-mode power converter as a buck converter in order to transfer energy from the energy storage element to the output capacitor via an electrical current through the power inductor.
    Type: Application
    Filed: October 26, 2020
    Publication date: May 27, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme G. MACKAY, Eric J. KING, Ajit SHARMA
  • Publication number: 20210126528
    Abstract: A battery management system configured to electrically couple to a battery may include a boost converter comprising a plurality of switches arranged to provide a boosted output voltage at an output of the boost converter from a source voltage of the battery and a bypass switch coupled between the battery and the output, wherein the battery management system is operable in a plurality of modes comprising a bypass mode wherein the source voltage is bypassed to the output and when the battery management system is in the bypass mode, at least one switch of the plurality of switches is enabled to increase a conductance between the battery and the output.
    Type: Application
    Filed: October 20, 2020
    Publication date: April 29, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Eric J. KING, John L. MELANSON, Graeme G. MACKAY, Lingli ZHANG
  • Patent number: 10972836
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: April 6, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Publication number: 20210083578
    Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
    Type: Application
    Filed: June 30, 2020
    Publication date: March 18, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Eric J. KING, Ajit SHARMA, Lingli ZHANG, Christian LARSEN, Graeme G. MACKAY
  • Publication number: 20200296509
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Patent number: 10734885
    Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal, generating the slope compensation signal to have a compensation value of approximately zero as seen by a compensation control loop of the switch-mode power supply, and modifying the slope compensation signal on successive switching cycles of the switch-mode power supply to account for differences in an output of the compensation control loop and an average current of an inductor of the switch-mode power supply in at least one phase of a switching period of a switching cycle of the switch-mode power supply.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: August 4, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Eric J. King, Siddharth Maru, Thomas Hoff, Graeme G. Mackay
  • Publication number: 20190386561
    Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal, generating the slope compensation signal to have a compensation value of approximately zero as seen by a compensation control loop of the switch-mode power supply, and modifying the slope compensation signal on successive switching cycles of the switch-mode power supply to account for differences in an output of the compensation control loop and an average current of an inductor of the switch-mode power supply in at least one phase of a switching period of a switching cycle of the switch-mode power supply.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 19, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Eric J. KING, Siddharth MARU, Thomas HOFF, Graeme G. MACKAY
  • Publication number: 20190181754
    Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal and generating the slope compensation signal to have a compensation value of approximately zero at an end of a duty cycle of operation of the switch-mode power supply.
    Type: Application
    Filed: November 28, 2018
    Publication date: June 13, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Mikel ASH, Eric J. KING, Lingli ZHANG, Graeme G. MACKAY
  • Publication number: 20190075394
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 7, 2019
    Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod