Patents by Inventor Graeme Peters

Graeme Peters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10549848
    Abstract: A shock strut for a vehicle includes a housing with a through channel and a motor mount, and a motor fixed to the housing. The cylinder of a shock strut is configured to define a lead screw on its outer surface. The cylinder extends through the housing. The piston of the shock strut is attached to a ground engaging assembly. A gear nut rotatably mounted in the housing threadably engages the threaded cylinder, and is configured to be driven by the motor. The housing is attached to the vehicle, and the gear nut is controllably rotated to extend and retract the shock strut. A sensor provided on the assembly monitors the position of the shock strut. A torsion link assembly reacts rotational forces on the cylinder.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: February 4, 2020
    Assignee: SAFRAN LANDING SYSTEMS CANADA INC.
    Inventors: Graeme Peter Arthur Klim, Steven Kevin Amberg, Clément Rodrigues De Souza Meireles, Min Prasad Adhikari, Mohammad Moeid Elahikahouker, Seyed Mohammad Hashemi
  • Patent number: 10528490
    Abstract: An apparatus and method are provided for managing bounded pointers. The apparatus has processing circuitry to execute a sequence of instructions, and a plurality of storage elements accessible to the processing circuitry, for storage of bounded pointers and non-bounded pointers. Each bounded pointer has explicit range information associated therewith indicative of an allowable range of memory addresses when using the bounded pointer. A current range check storage element is then used to store a current range check state for the processing circuitry. When the current range check state indicates a default state, the processing circuitry is responsive to execution of a memory access instruction identifying a pointer to be used to identify a memory address, to perform a range check operation to determine whether access to that memory address is permitted.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: January 7, 2020
    Assignee: ARM Limited
    Inventor: Graeme Peter Barnes
  • Patent number: 10505345
    Abstract: A mode locking semiconductor disk laser (SDL) comprising a resonator terminated by first and second mirrors and folded by a third mirror is presented. The third mirror includes a semiconductor disk laser (SDL) suitable for generating a resonator field having a predetermined central wavelength ?0, while the second mirror includes an intensity saturable mirror suitable for mode locking the resonator field at the predetermined wavelength. The central wavelength of the reflectivity profile of the first and or second mirrors is shifted to a wavelength shorter than the central wavelength ?0 to suppress gain at wavelengths longer than the central wavelength ?0. By mismatching the reflectivity profile of the first and or second mirrors to that of the desired output wavelength provides a stable mode locked laser with significantly reduced noise.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: December 10, 2019
    Assignee: Solus Technologies Limited
    Inventors: Craig James Hamilton, Graeme Peter Alexander Malcolm
  • Patent number: 10472825
    Abstract: A hollow plastic wall panel, the panel having a length greater than a width, a thickness less than the width, a front wall, an opposite back wall and opposed first and second long edge regions, wherein the panel comprises a first end and a longitudinally opposite second end, wherein the first long edge region defines at least one first recessed portion to longitudinally receive and mate with a first longitudinal support structure and wherein the second long edge region defines at least one second recessed portion to longitudinally receive and mate with a second longitudinal support structure.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 12, 2019
    Assignee: AUS GROUP ALLIANCE PTY LTD
    Inventors: Nicholas Marandos, Adam Lee Taylor, Graeme Peter Hall, Graeme Francis Hisgrove, Neil Joseph Clowes, Adrian Leigh Massey
  • Publication number: 20190334309
    Abstract: A method and apparatus for passively synchronising the repetition rate of two or more mode-locked lasers is described. The method and apparatus involve forming a first synchronising optical field (6) by separating a portion of an output field of a first mode-locked laser (2) and thereafter redirecting this synchronising optical field to form a driving signal for a second mode-locked laser (3). Employing these techniques results in systems with timing jitter of less than 1 fs. The method is independent of the wavelength and polarisation at which the mode-locked lasers operate and so is not limited to use with any particular type of mode-locked laser. Since the technique is passive it does not require the employment of electronics, variable time delay paths or additional non-linear optical crystals. Therefore, the method and apparatus are significantly less complex than those known in the art and are not power limited by additional non-linear optical processes.
    Type: Application
    Filed: November 14, 2017
    Publication date: October 31, 2019
    Inventors: Gareth Thomas MAKER, Graeme Peter Alexander MALCOLM, Lukasz KORNASZEWSKI
  • Patent number: 10416963
    Abstract: A data processing apparatus is provided, for performing a determination of whether a value falls within a boundary defined by a lower limit between 0 and 2m and an upper limit between 0 and 2m. The apparatus includes storage circuitry that stores each of the lower limit and the upper limit in a compressed form as a mantissa of q<m bits and a shared exponent e. A most significant m-q-e bits of said lower limit and said upper limit are equal to a most significant m-q-e bits of said value. Adjustment circuitry performs adjustments to the lower limit and the upper limit in compressed form and boundary comparison circuitry performs the determination on the value using the lower limit and the upper limit in the compressed form.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: September 17, 2019
    Assignee: ARM Limited
    Inventors: Daniel Arulraj, Graeme Peter Barnes, Lee Eisen, Gary Gorman
  • Patent number: 10416036
    Abstract: An apparatus and a method monitor fluid loss from one or more casks during a maturation process. The apparatus comprises a multi-pass absorption cell arranged in fluid communication with one or more fluid conduits, a pump and a monitoring system. The pump and fluid conduits transport a fluid sample (e.g. vapor sample) from a perimeter of the one or more casks to the multi-pass absorption cell. The monitoring system detects and identifies fluid within the multi-pass absorption cell.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: September 17, 2019
    Assignee: M Squared Lasers Limited
    Inventors: Gareth Thomas Maker, Graeme Peter Alexander Malcolm, John Nicholls
  • Publication number: 20190258574
    Abstract: A data processing apparatus 2 includes a cache memory 8 for storing data items to be accessed. Coherency control circuitry 20 controls coherency between data items stored within the cache memory and one or more other copies of the data items stored outside the cache memory. A data access buffer 6 buffers a plurality of data access to respective data items stored within the cache memory. Access control circuitry 20 is responsive to coherency statuses managed by the coherency control circuitry for the plurality of data items to be subject to data access operations to be performed together atomically as an atomic set of data accesses to ensure that the coherency statuses for all of these data items permit all of the atomic set of data accesses to be performed within the cache memory before the set of atomic data accesses are commenced.
    Type: Application
    Filed: August 18, 2017
    Publication date: August 22, 2019
    Inventors: Jason PARKER, Graeme Peter BARNES
  • Publication number: 20190095389
    Abstract: An apparatus is provided comprising storage elements to store data blocks, where each data block has capability metadata associated therewith identifying whether the data block specifies a capability, at least one capability type being a bounded pointer. Processing circuitry is then arranged to be responsive to a bulk capability metadata operation identifying a plurality of the storage elements, to perform an operation on the capability metadata associated with each data block stored in the plurality of storage elements. Via a single specified operation, this hence enables query and/or modification operations to be performed on multiple items of capability metadata, hence providing more efficient access to such capability metadata.
    Type: Application
    Filed: March 29, 2017
    Publication date: March 28, 2019
    Inventors: Graeme Peter BARNES, Stuart David BILES
  • Publication number: 20190034664
    Abstract: An apparatus and method are provided for controlling use of bounded pointers. The apparatus includes storage to store bounded pointers, where each bounded pointer comprises a pointer value and associated attributes, with the associated attributes including range information indicative of an allowable range of addresses when using the pointer value. Processing circuitry is used to perform a signing operation on an input bounded pointer in order to generate an output bounded pointer in which a signature generated by the signing operation is contained within the output bounded pointer in place of specified bits of the input bounded pointer. In addition, the associated attributes include signing information which is set by the processing circuitry within the output bounded pointer to identify that the output bounded pointer has been signed. Such an approach provides increase resilience to control flow integrity attack when using bounded pointers.
    Type: Application
    Filed: December 23, 2016
    Publication date: January 31, 2019
    Inventors: Graeme Peter BARNES, Richard Roy GRISENTHWAITE
  • Publication number: 20190026236
    Abstract: An apparatus and method are provided for generating signed bounded pointers from general purpose specified data, for example data that may exist within a backing store such as a disk. The apparatus has processing circuitry that is responsive to a bounded pointer generation request to perform a generation operation to generate a bounded pointer from the specified data provided at least one generation condition is met. The bounded pointer comprises a pointer value and associated attributes, and the associated attributes include range information indicative of an allowable range of addresses when using the pointer value.
    Type: Application
    Filed: December 23, 2016
    Publication date: January 24, 2019
    Applicant: ARM Limited
    Inventor: Graeme Peter BARNES
  • Publication number: 20190012455
    Abstract: An apparatus and method are provided for controlling use of bounded pointers. The apparatus has a plurality of bounded pointer storage elements, each bounded pointer storage element being used to store a bounded pointer and associated permission attributes indicative of allowed uses of the bounded pointer. In accordance with the present technique, the associated permission attributes include a copy permission attribute indicating whether the bounded pointer is allowed to be subjected to a copy operation. Processing circuitry is then responsive to at least one instruction that specifies the copy operation, to generate, from a source bounded pointer and associated permission attributes of a source bounded pointer storage element, a destination bounded pointer and associated permission attributes to be stored in a destination bounded pointer storage element.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 10, 2019
    Inventor: Graeme Peter BARNES
  • Publication number: 20180364980
    Abstract: A data processing apparatus is provided, for performing a determination of whether a value falls within a boundary defined by a lower limit between 0 and 2m and an upper limit between 0 and 2m. The apparatus includes storage circuitry that stores each of the lower limit and the upper limit in a compressed form as a mantissa of q<m bits and a shared exponent e. A most significant m-q-e bits of said lower limit and said upper limit are equal to a most significant m-q-e bits of said value. Adjustment circuitry performs adjustments to the lower limit and the upper limit in compressed form and boundary comparison circuitry performs the determination on the value using the lower limit and the upper limit in the compressed form.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Inventors: Daniel ARULRAJ, Graeme Peter BARNES, Lee EISEN, Gary GORMAN
  • Publication number: 20180349294
    Abstract: An apparatus and method are provided for managing bounded pointers. The apparatus has processing circuitry to execute a sequence of instructions, and a plurality of storage elements accessible to the processing circuitry, for storage of bounded pointers and non-bounded pointers. Each bounded pointer has explicit range information associated therewith indicative of an allowable range of memory addresses when using the bounded pointer. A current range check storage element is then used to store a current range check state for the processing circuitry. When the current range check state indicates a default state, the processing circuitry is responsive to execution of a memory access instruction identifying a pointer to be used to identify a memory address, to perform a range check operation to determine whether access to that memory address is permitted.
    Type: Application
    Filed: October 19, 2016
    Publication date: December 6, 2018
    Inventor: Graeme Peter BARNES
  • Publication number: 20180312245
    Abstract: A shock strut for a vehicle includes a housing with a through channel and a motor mount, and a motor fixed to the housing. The cylinder of a shock strut is configured to define a lead screw on its outer surface. The cylinder extends through the housing. The piston of the shock strut is attached to a ground engaging assembly. A gear nut rotatably mounted in the housing threadably engages the threaded cylinder, and is configured to be driven by the motor. The housing is attached to the vehicle, and the gear nut is controllably rotated to extend and retract the shock strut. A sensor provided on the assembly monitors the position of the shock strut. A torsion link assembly reacts rotational forces on the cylinder.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 1, 2018
    Applicant: Safran Landing Systems Canada Inc.
    Inventors: Graeme Peter Arthur Klim, Steven Kevin Amberg, Clément Rodrigues De Souza Meireles, Min Prasad Adhikari, Mohammad Moeid Elahikahouker, Seyed Mohammad Hashemi
  • Patent number: 10089189
    Abstract: Devices and methods for receiving a data file in a communication system. In one embodiment, the wireless communication device includes a transceiver, a memory, and an electronic processor. The transceiver is configured to send and receive data over a wireless communication network. The electronic processor is electrically coupled to the transceiver and the memory and configured to receive, with the transceiver, a first seed, a sequence of blocks, and a subsequent seed, cause the memory to save the sequence of blocks in the memory, and determine whether the subsequent seed is aligned with the first seed. When the subsequent seed is not aligned with the first seed, the electronic processor is configured to cause the memory to delete the sequence of blocks. When the subsequent seed is aligned with the first seed, the electronic processor is configured to cause the memory to maintain the sequence of blocks.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: October 2, 2018
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Harish Natarahjan, Graeme Peter Johnson, Daniel J. McDonald
  • Patent number: 10069279
    Abstract: A self mode locking laser and corresponding method is described. The laser comprises a resonator (2) terminated by first (3) and second (4) mirrors and folded by a third mirror (5). The third mirror comprises a reflector (15) surmounted by a multilayer semiconductor gain medium (16) that includes at least one quantum well layer and an optical Kerr lensing layer (20). A perturbator is also included that provides a means to induce a perturbation on an intensity of one or more cavity modes of the resonator. The pertubator is employed to induce a small perturbation on the intensity of the cavity modes of the resonator which is sufficient for the optical Kerr lensing layer to induce mode locking on the output field. The second mirror (4) comprises an intensity saturable mirror that provides a means for reducing the pulse widths of the generated output field e.g. to around 100 fs.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 4, 2018
    Assignee: SOLUS TECHNOLOGIES LIMITED
    Inventors: Graeme Peter Alexander Malcolm, Craig James Hamilton
  • Publication number: 20180225120
    Abstract: An apparatus and method are provided for controlling instruction execution behaviour. The apparatus includes a set of data registers for storing data values, and a set of bounded pointer storage elements, where each bounded pointer storage element stores a pointer having associated range information indicative of an allowable range of addresses when using that pointer. A control storage element stores a current instruction context, and that current instruction context is used to influence the behaviour of at least one instruction executed by processing circuitry, that at least one instruction specifying a pointer reference for a required pointer, where the pointer reference is within at least a first subset of values (in one embodiment the behaviour is influenced irrespective of the value of the required pointer).
    Type: Application
    Filed: July 21, 2016
    Publication date: August 9, 2018
    Inventor: Graeme Peter BARNES
  • Patent number: 9966732
    Abstract: An optical amplifier is described. The optical amplifier (1) comprises a semiconductor disk gain medium (2) including at least one quantum well layer (9) and a pump field source (17) for generating an optical pump field (3) for the semiconductor disk gain medium. The optical amplifier acts to generate an output optical field (5) from an input optical field (4) received by the optical amplifier and arranged to be incident upon the semiconductor disk gain medium. Employing a semiconductor disk gain medium within the optical amplifier allows it to be optically pumped and thus provided for increased stability and beam quality of the output optical field while allowing for the design of optical amplifiers which can operate across a broad range of wavelengths. The optical amplifier may be employed with continuous wave or pulsed input optical fields.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: May 8, 2018
    Assignee: SOLUS TECHNOLOGIES LIMITED
    Inventors: Craig James Hamilton, Graeme Peter Alexander Malcolm
  • Patent number: 9941657
    Abstract: A passively mode-locking laser and corresponding method is described. The laser comprises a resonator (2) terminated by first (3) and second (4) mirrors and folded by a third (5) and fourth (6) mirror. The third mirror comprises a reflector (14) surmounted by a multilayer semiconductor gain medium (15) including at least one quantum well layer while the second mirror (4) comprises an intensity saturable mirror. The resonator is configured to provide a cross sectional area of an intra cavity resonating field on the intensity saturable mirror that is greater than or equal to a cross sectional area of the intra cavity resonating field on the multilayer semiconductor gain medium. This arrangement provides a passively mode-locking laser that exhibits increased stability when compared to those systems known in the art.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: April 10, 2018
    Assignee: SOLUS TECHNOLOGIES LIMITED
    Inventors: Craig James Hamilton, Graeme Peter Alexander Malcolm