Abstract: I/O measurement data for channels attached to logical control unit queues is obtained related to a plurality of logical control unit queues. A store secondary queue measurement data instruction specifies a range of queues for which extended secondary measurement blocks derived from the I/O measurement data are stored at a memory address specified by the store secondary queue measurement data instruction.

Abstract: A system for distributing a plurality of tasks over a plurality of nodes in a network includes: a plurality of processors for executing tasks; a plurality of nodes comprising processors; a task dispatcher; and a load balancer. The task dispatcher receives as input the plurality of tasks; calculates a task processor consumption value for the tasks; calculates a node processor consumption value for the nodes; calculates a target node processor consumption value for the nodes; and then calculates a load index value as a difference between the calculated node processor consumption for a node i and the target node processor consumption value for the node i. The balancer distributes the tasks among the nodes to balance the processor workload among the nodes according to the calculated load index value of each node, such that the calculated load index value of each node is substantially zero.

Abstract: A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps: calculating a task process consumption value for the tasks; calculating a measured node processor consumption value for the nodes; calculating a target node processor consumption value for the nodes, the target node processor consumption value indicating optimal node processor consumption; calculating a load index value as a difference between the calculated node processor consumption value for a node i and the target node processor consumption value for node i; and distributing the tasks among the nodes to balance a processor workload among the nodes, according to the calculated load index value, such that the calculated load index value of each node is substantially zero.

Abstract: An Input/output (I/O) measurement block facility is provided that creates subchannel measurement blocks (comprising device busy values) related to performance of an I/O operation of a subchannel, wherein a device busy time value is a sum of time intervals when the subchannel is device busy during an attempt to initiate any one of a start function or a resume function at the subchannel.

Abstract: I/O measurement data for channels attached to logical control unit queues is obtained related to a plurality of logical control unit queues. A store secondary queue measurement data instruction specifies a range of queues for which extended secondary measurement blocks derived from the I/O measurement data are stored at a memory address specified by the store secondary queue measurement data instruction.

Abstract: An Extended Input/output (I/O) measurement word facility is provided. Provision is made for emulation of the Extended I/O measurement word facility. The facility provides for storing measurement data associated with a single I/O operation in an extended measurement word associated with an I/O response block. In a further aspect, the stored data may have a resolution of approximately one-half microsecond.

Abstract: An Extended Input/output (I/O) measurement block facility is emulated. The facility provides for the collection of relevant I/O measurement data, and the storing for later efficient retrieval of that data in an extended measurement block. The stored data relates to the performance of an I/O subchannel.

Abstract: A method is provided for determining whether a logical processor of an information processing system has access to an address space of the information processing system. An instruction is issued by a first processor, the instruction referencing a target logical processor and a target address space. In response to the instruction, first information is checked to determine whether the target logical processor is running. When it is determined that the target logical processor is not running, second information is checked by a host program to determine whether the target logical processor has access to the target address space.

Abstract: A method is provided for a first logical processor to determine a running status of a target logical processor of an information processing system. In such method, an instruction is issued by the first logical processor running on the information processing system for determining whether the target logical processor is running. In response to issuing the instruction, a state descriptor belonging to the target logical processor is queried to determine whether the target logical processor is currently running. A result is then returned to the first logical processor, the result indicating whether or not the target logical processor is currently running.

Abstract: A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps: calculating a task process consumption value for the tasks; calculating a measured node processor consumption value for the nodes; calculating a target node processor consumption value for the nodes, the target node processor consumption value indicating optimal node processor consumption; calculating a load index value as a difference between the calculated node processor consumption value for a node i and the target node processor consumption value for node i; and distributing the tasks among the nodes to balance a processor workload among the nodes, according to the calculated load index value, such that the calculated load index value of each node is substantially zero.

Abstract: I/O measurement data associated with the performance of an I/O operation process is gathered during the I/O process. The I/O measurement data is saved in an IRB memory location specified by a test subchannel instruction. An I/O interrupt signals the completion of the I/O operation process.

Abstract: I/O measurement data associated with the performance of an I/O operation process is gathered during the I/O process. The I/O measurement data is saved in an IRB memory location specified by a test subchannel instruction. An I/O interrupt signals the completion of the I/O operation process.

Abstract: An Input/output (I/O) measurement block facility is provided that creates subchannel measurement blocks (comprising device busy values) related to performance of an I/O operation of a subchannel, wherein a device busy time value is a sum of time intervals when the subchannel is device busy during an attempt to initiate any one of a start function or a resume function at the subchannel.

Abstract: Input/output (I/O) measurement facilities are provided. An extended I/O measurement block facility is provided that enables measurement blocks to be stored in discontiguous areas of main storage and to be accessed directly via addresses. In a further aspect, an extended I/O measurement word facility is provided that facilitates the obtaining of measurement data for single I/O operations.

Abstract: I/O measurement data for channels attached to logical control unit queues is obtained related to a plurality of logical control unit queues. A store secondary queue measurement data instruction specifies a range of queues for which extended secondary measurement blocks derived from the I/O measurement data are stored at a memory address specified by the store secondary queue measurement data instruction.

Abstract: I/O measurement data associated with the performance of an I/O operation process is gathered during the I/O process. The I/O measurement data is saved in an IRB memory location specified by a test subchannel instruction. An I/O interrupt signals the completion of the I/O operation process.

Abstract: In a computing system implementing a virtual memory system having real memory storage frames for storing virtual pages of data and an auxiliary storage system comprising auxiliary storage slots for storing copies of corresponding virtual pages provided in real storage frames, a system and method for freeing auxiliary storage slots to enable further copying of pages thereto.

Abstract: Input/output (I/O) measurement facilities are provided. An extended I/O measurement block facility is provided that enables measurement blocks to be stored in discontiguous areas of main storage and to be accessed directly via addresses. In a further aspect, an extended I/O measurement word facility is provided that facilitates the obtaining of measurement data for single I/O operations.

Abstract: A method and apparatus for runtime remediation of object-code instructions (such as date instructions that are not year 2000 compliant) in a computer program. Before runtime, a setup function of a program monitor locates each instruction to be remediated in a load module of a user program and overlays the instruction with a trap instruction. The address of the overlaid instruction is stored in a scan slot of a window control table (WCT). The text of the overlaid instruction is stored in a corresponding operand slot of the WCT along with control information including a set of flags and windowing and cycling parameters. At runtime, upon decoding a trap instruction, the CPU transfers control to an instruction simulation function of the program monitor, which searches the scan slots of the WCT for the one containing the address of the overlaid instruction.

Abstract: An exemplary embodiment of the invention is a virtual memory structure having a first virtual memory space and a virtual page frame table space. The first virtual memory space includes at least one private area and at least one common area. The virtual page frame table space is separate from the first virtual memory space. The virtual page frame table space includes at least one page frame table entry representing a frame of real memory.