Patents by Inventor Gregory P. Muldowney

Gregory P. Muldowney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8257142
    Abstract: Shape memory chemical mechanical polishing methods are provided that use shape memory chemical mechanical polishing pads having a polishing layer in a densified state, wherein the polishing pad thickness and/or groove depth is monitored and the polishing layer is selectively exposed to an activating stimulus causing a transition from the densified state to a recovered state.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: September 4, 2012
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Gregory P. Muldowney, Ravichandra V. Palaparthi
  • Patent number: 8062103
    Abstract: The invention provides a polishing pad useful for polishing at least one of a magnetic, optical and semiconductor substrate in the presence of a polishing medium with a polishing pad. The polishing pad comprises a center, an inner region surrounding the center, a transition region connecting grooves from the inner region to an outer region surrounding the inner region. The outer region has multiple grooves with a high-rate path. The transition region is adjacent the outer region and within a radius from the center defined as follows: r TR = 0.7 ? r * ? ? to ? ? 1.3 ? r * where r * = R C ? ( R R C ) 2 - cos ? ( 2 ? ? c ? ? 0 ) - sin ? ( 2 ? ? c ? ? 0 ) ? ( R / R C cos ? ? ? c ? ? 0 ) 2 - 1 ; with the inner region originating continuous grooves that extend uninterrupted to the outer region.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 22, 2011
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Patent number: 8057282
    Abstract: The invention provides a method for polishing at least one of a magnetic, optical and semiconductor substrate in the presence of a polishing medium with a polishing pad. The substrate is fixed within a carrier fixture having a channel-free surface. The method comprises securing the substrate in the carrier fixture with the channel-free surface adjacent and parallel to a polishing surface of the polishing pad. The polishing pad has multiple grooves with high-rate paths. The method includes applying polishing medium to the polishing pad adjacent the carrier fixture; and rotating the polishing pad and carrier fixture to polish the substrate with the polishing pad and the polishing medium wherein the channel-free surface of the carrier fixture presses against the polishing pad to impede flow of the polishing medium into the substrate and the high-rate groove paths traverse the carrier fixture to promote flow of the polishing medium to the substrate.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 15, 2011
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Patent number: 7828634
    Abstract: The polishing pad (104) is useful for polishing at least one of magnetic, optical and semiconductor substrates (112) in the presence of a polishing medium (120). The polishing pad (104) includes a plurality of polishing elements (402, 502, 602, 702). The polishing elements (402, 502, 602, 702) are aligned in a vertical direction and having a first and a second end. A plurality of junctions (404, 510, 610, 710) connects the first and second ends of the polishing elements (402, 502, 602, 702) with at least three polishing elements at each of the plurality of junctions (404, 510, 610, 710) for forming a tier. Each tier representing a thickness in the vertical direction between the first and second ends of the polishing elements (402, 502, 602, 702). And an interconnected lattice structure (400, 600) forms from connecting sequential tiers of the plurality of junctions (404, 504) that connect the polishing elements (402, 502, 602, 702).
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: November 9, 2010
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Bo Jiang, Gregory P. Muldowney
  • Patent number: 7807252
    Abstract: A chemical mechanical polishing pad (104, 400) that includes a polishing layer (108, 420, 500) having a set of primary grooves (124, 408, 516) formed in a polishing surface (110, 428, 520) of the pad. The pad also includes a set of secondary grooves (128, 404, 504) that become selectively active as a function of the wear of the polishing layer from polishing.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: October 5, 2010
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Jeffrey J. Hendron, Gregory P. Muldowney
  • Patent number: 7771251
    Abstract: The polishing pad (104) is useful for polishing at least one of magnetic, optical and semiconductor substrates (112) in the presence of a polishing medium (120). The polishing pad (104) includes a three-dimensional network of interconnected unit cells (225). The interconnected unit cells (225) are reticulated for allowing fluid flow and removal of polishing debris. A plurality of polishing elements (208, 308 and 408) form the three-dimensional network of interconnected unit cells (225). The polishing elements (208, 308 and 408) have a first end connected to a first adjacent polishing element at a first junction (209, 309 and 409) and a second end connected to a second adjacent polishing element at a second junction (209, 309 and 409) and having a cross-sectional area (222, 322 and 422) that remains within 30% between the first and the second junctions (209, 309 and 409).
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: August 10, 2010
    Assignees: Rohm and Haas Electronic, Electronic Materials CMP Holding, Inc.
    Inventor: Gregory P. Muldowney
  • Publication number: 20100159811
    Abstract: The invention provides a polishing pad useful for polishing at least one of a magnetic, optical and semiconductor substrate in the presence of a polishing medium with a polishing pad. The polishing pad comprises a center, an inner region surrounding the center, a transition region connecting grooves from the inner region to an outer region surrounding the inner region. The outer region has multiple grooves with a high-rate path. The transition region is adjacent the outer region and within a radius from the center defined as follows: r TR = 0.7 ? r * ? ? to ? ? 1.3 ? r * where r * = R C ? ( R R C ) 2 - cos ? ( 2 ? ? c ? ? 0 ) - sin ? ( 2 ? ? c ? ? 0 ) ? ( R / R c cos ? ? ? c ? ? 0 ) 2 - 1 ; with the inner region originating continuous grooves that extend uninterrupted to the outer region.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventor: Gregory P. Muldowney
  • Publication number: 20100159810
    Abstract: The invention provides a method for polishing at least one of a magnetic, optical and semiconductor substrate in the presence of a polishing medium with a polishing pad. The substrate is fixed within a carrier fixture having a channel-free surface. The method comprises securing the substrate in the carrier fixture with the channel-free surface adjacent and parallel to a polishing surface of the polishing pad. The polishing pad has multiple grooves with high-rate paths. The method includes applying polishing medium to the polishing pad adjacent the carrier fixture; and rotating the polishing pad and carrier fixture to polish the substrate with the polishing pad and the polishing medium wherein the channel-free surface of the carrier fixture presses against the polishing pad to impede flow of the polishing medium into the substrate and the high-rate groove paths traverse the carrier fixture to promote flow of the polishing medium to the substrate.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventor: Gregory P. Muldowney
  • Patent number: 7635291
    Abstract: Chemical mechanical polishing pads are provided, wherein the chemical mechanical polishing pads have a polishing layer comprising an interpenetrating network including a continuous non-fugitive phase and a substantially co-continuous fugitive phase. Also provided are methods of making the chemical mechanical polishing pads and for using them to polish substrates.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: December 22, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P Muldowney
  • Patent number: 7635290
    Abstract: Chemical mechanical polishing pads are provided, wherein the chemical mechanical polishing pads have a polishing layer comprising an interpenetrating network including a continuous non-fugitive phase and a substantially co-continuous fugitive phase. Also provided are methods of making the chemical mechanical polishing pads and for using them to polish substrates.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: December 22, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Publication number: 20090280725
    Abstract: Chemical mechanical polishing pads are provided, wherein the chemical mechanical polishing pads have a polishing layer comprising an interpenetrating network including a continuous non-fugitive phase and a substantially co-continuous fugitive phase. Also provided are methods of making the chemical mechanical polishing pads and for using them to polish substrates.
    Type: Application
    Filed: July 16, 2009
    Publication date: November 12, 2009
    Applicant: Rohm and Haas Electronic Materials CMP Holdings, INC.
    Inventor: Gregory P Muldowney
  • Patent number: 7604529
    Abstract: The polishing pad (104) is useful for polishing at least one of magnetic, optical and semiconductor substrates (112) in the presence of a polishing medium (120). The polishing pad (104) includes a three-dimensional network of interconnected unit cells (225). The interconnected unit cells (225) are reticulated for allowing fluid flow and removal of polishing debris. A plurality of polishing elements (208) form the three-dimensional network of interconnected unit cells (225). The polishing elements (208) have a mean height (214) to a mean width (222) ratio of at least 3. The polishing surface (200) formed from the plurality of polishing elements (208) remains consistent for multiple polishing operations.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: October 20, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Publication number: 20090258573
    Abstract: Shape memory chemical mechanical polishing methods are provided that use shape memory chemical mechanical polishing pads having a polishing layer in a densified state, wherein the polishing pad thickness and/or groove depth is monitored and the polishing layer is selectively exposed to an activating stimulus causing a transition from the densified state to a recovered state.
    Type: Application
    Filed: April 15, 2008
    Publication date: October 15, 2009
    Inventors: Gregory P. Muldowney, Ravichandra V. Palaparthi
  • Patent number: 7530887
    Abstract: Chemical mechanical polishing pads are provided, wherein the chemical mechanical polishing pads have a polishing layer comprising a polishing texture that exhibits a dimensionless roughness, R, is between 0.01 and 0.75. Also provided are methods of making the chemical mechanical polishing pads and for using them to polish substrates.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: May 12, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Bo Jiang, Gregory P. Muldowney, Ravichandra V. Palaparthi
  • Patent number: 7520798
    Abstract: A chemical mechanical polishing pad having an annular polishing track and a concentric center O. The polishing pad includes a polishing layer having a plurality of pad grooves formed therein. The polishing pad is designed for use with a carrier, e.g., a wafer carrier, that includes a polishing ring having a plurality of carrier grooves. Each of the plurality of pad grooves has a carrier-compatible groove shape configured to enhance the transport of a polishing medium beneath the carrier ring on the leading edge of the carrier ring during polishing.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: April 21, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Patent number: 7520796
    Abstract: A chemical mechanical polishing pad having an annular polishing track and a concentric center O. The polishing pad includes a polishing layer having a plurality of pad grooves formed therein. The polishing pad is designed for use with a carrier, e.g., a wafer carrier, that includes a polishing ring having a plurality of carrier grooves. Each of the plurality of pad grooves has a carrier-compatible groove shape configured to enhance the transport of a polishing medium beneath the carrier ring on the leading edge of the carrier ring during polishing.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: April 21, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Patent number: 7517277
    Abstract: The polishing pad (104) is useful for polishing at least one of a magnetic, optical and semiconductor substrate (112) in the presence of a polishing medium (120). The polishing pad 104 includes multiple layers of polishing filaments (200, 300, 400, 500) stacked on a base layer (204, 404, 504) of polishing filaments, the multiple layers of polishing filaments (200, 300, 400, 500) having a sequential stacked formation with each layer of the polishing filaments being above and attached to a lower polishing filament, the multiple layers of polishing filaments (200, 300, 400, 500) being parallel to a polishing surface of the polishing pad (104) and wherein individual polishing filaments (202, 302, 402) of the multiple layers of polishing filaments (200, 300, 400, 500) are above an average of at least three polishing filaments (202, 302, 402), to form the polishing pad having an open lattice structure of interconnected polishing filaments (210, 310, 410, 510, 610).
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: April 14, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Patent number: 7503833
    Abstract: The polishing pad (104) is useful for polishing at least one of magnetic, optical and semiconductor substrates (112) in the presence of a polishing medium (120). The polishing pad (104) includes a three-dimensional network of interconnected unit cells (225). The interconnected unit cells (225) are reticulated for allowing fluid flow and removal of polishing debris. A plurality of polishing elements (208, 308 and 408) form the three-dimensional network of interconnected unit cells (225). The polishing elements (208, 308 and 408) have a first end connected to a first adjacent polishing element at a first junction (209, 309 and 409) and a second end connected to a second adjacent polishing element at a second junction (209, 309 and 409) and having a cross-sectional area (222, 322 and 422) that remains within 30% between the first and the second junctions (209, 309 and 409).
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: March 17, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Gregory P. Muldowney
  • Publication number: 20090047877
    Abstract: The polishing pad (104) is useful for polishing at least one of a magnetic, optical and semiconductor substrate (112) in the presence of a polishing medium (120). The polishing pad 104 includes multiple layers of polishing filaments (200, 300, 400, 500) stacked on a base layer (204, 404, 504) of polishing filaments, the multiple layers of polishing filaments (200, 300, 400, 500) having a sequential stacked formation with each layer of the polishing filaments being above and attached to a lower polishing filament, the multiple layers of polishing filaments (200, 300, 400, 500) being parallel to a polishing surface of the polishing pad (104) and wherein individual polishing filaments (202, 302, 402) of the multiple layers of polishing filaments (200, 300, 400, 500) are above an average of at least three polishing filaments (202, 302, 402), to form the polishing pad having an open lattice structure of interconnected polishing filaments (210, 310, 410, 510, 610).
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Inventor: Gregory P. Muldowney
  • Publication number: 20090047883
    Abstract: The polishing pad (104) is useful for polishing at least one of magnetic, optical and semiconductor substrates (112) in the presence of a polishing medium (120). The polishing pad (104) includes a plurality of polishing elements (402, 502, 602, 702). The polishing elements (402, 502, 602, 702) are aligned in a vertical direction and having a first and a second end. A plurality of junctions (404, 510, 610, 710) connects the first and second ends of the polishing elements (402, 502, 602, 702) with at least three polishing elements at each of the plurality of junctions (404, 510, 610, 710) for forming a tier. Each tier representing a thickness in the vertical direction between the first and second ends of the polishing elements (402, 502, 602, 702). And an interconnected lattice structure (400, 600) forms from connecting sequential tiers of the plurality of junctions (404, 504) that connect the polishing elements (402, 502, 602, 702).
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Inventors: Bo Jiang, Gregory P. Muldowney