Abstract: An electronic system includes first, second, third, and fourth integrated circuit dies. The third integrated circuit die has a first voltage regulator circuit. A supply voltage output of the first voltage regulator circuit is coupled to provide a first supply voltage to a supply voltage input of the first integrated circuit die. The first voltage regulator circuit generates a first power ready signal that indicates when the first supply voltage has reached a first threshold voltage. The fourth integrated circuit die has a second voltage regulator circuit that generates a second supply voltage in response to the first power ready signal. A supply voltage output of the second voltage regulator circuit is coupled to provide the second supply voltage to a supply voltage input of the second integrated circuit die.

Abstract: A method for designing an accelerated battery aging testing protocol from battery electric vehicle usage data is provided. An initial search space database is created based on a collection of vehicle usage data. The usage data includes current demand over a first timeframe. Data compression is performed including classifying the database into specific segments representing use events. A synthetic profile is generated including a sequence of elements having a battery current and a battery state of charge (SOC) for selected segments of the specific segments. An optimization for accelerated aging of the battery is defined. A genetic algorithm (GA) is executed that generates the accelerated battery aging testing protocol requiring a second timeframe, shorter than the first timeframe, based on the optimization.

Abstract: A front light module which includes a light guide plate, a light-emitting component and a barrier layer is provided. The light guide plate has a light incident surface and a light exiting surface which is adjacent to the light incident surface, and the light-emitting component emits the light toward the light incident surface. The barrier layer which includes the materials with silicon bonding is located on the light exiting surface of the light guide plate. The water vapor transmission rate of the barrier layer is lower than 0.1 g/m2/day.

Abstract: Disclosed are a method and apparatus for constructing a three-dimensional data set of a pedestrian re-identification based on a neural radiation field. The method includes the following steps: S1: capturing images of pedestrians to be entered by a group of cameras at different viewing angles; S2: generating a three-dimensional spatial position point set by sampling through camera rays in the scenario, and converting observation directions of the cameras corresponding to the three-dimensional spatial position point set into three-dimensional Cartesian unit vectors; and S3: inputting, into a multi-layer sensor, the three-dimensional spatial position point set and the observation directions converted into the three-dimensional Cartesian unit vectors, to output corresponding densities and colors. The method and apparatus of the present disclosure gives a brand-new method for constructing a pedestrian re-identification data set, and provides a new idea of data set construction.

Abstract: A method for data processing is provided, and includes: obtaining each piece of to-be-processed data, determining whether a set amount of the to-be-processed data is capable to be processed under a current processing process by a data processing model, if not, obtaining data processing periods of the data processing model under multiple configuration combinations; for a data processing period of each of the multiple configuration combinations, determining an amount of data that is capable to be processed by the data processing model within the data processing period, as a target data amount; by taking the data processing model to be capable to process the set amount of the to-be-processed data as a target, according to the target data amount for a data processing period of each of the multiple configuration combinations, selecting a target configuration combination from the multiple configuration combinations.

Abstract: The present disclosure discloses a method and an apparatus for training a distributed model based on node fault perception, a storage medium, and an electronic device. During model training, a backup node can be assigned to each device node used during model training, such that in response to monitoring that a device node is faulty, the backup node corresponding to the faulty device node can take over the model training task, thereby ensuring the efficiency of the model training task.

Abstract: An integrated circuit includes a first voltage decrease detection circuit that has a first comparator circuit that compares a supply voltage in the integrated circuit to a threshold voltage to generate a first detection signal that indicates a decrease in the supply voltage, and a first timestamp storage circuit that stores a first timestamp in response to the first detection signal indicating the decrease. The integrated circuit includes a second voltage decrease detection circuit that has a second comparator circuit that compares the supply voltage to the threshold voltage to generate a second detection signal that indicates the decrease, and a second timestamp storage circuit that stores a second timestamp in response to the second detection signal indicating the decrease. The integrated circuit includes a control circuit that determines a location of a source of the decrease in the integrated circuit based on the first and the second timestamps.

Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

Abstract: Disclosed is a bainite steel comprising the following chemical components in percentages by mass: 0.10-0.19% of C, 0.05-0.45% of Si, 1.5-2.2% of Mn, 0.001-0.0035% of B, 0.01-0.05% of Al, 0.05-0.40% of Cr, 0.05-0.40% of Mo, and more than or equal to 90% of Fe. By rationally controlling the contents of C, Si, Mn, B, Al, Cr, Mo, and the other elements in the steel, the steel can spontaneously form a phase having a structural gradient during the preparation process. In addition, the hardenability of the steel is also improved, such that the strength and forming performance of the bainite steel can be improved. Further disclosed in the present invention is a method for preparing the bainite steel.

Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A method includes performing a first post Chemical Mechanical Polish (CMP) cleaning on a wafer using a first brush. The first brush rotates to clean the wafer. The method further includes performing a second post-CMP cleaning on the wafer using a second brush. The second brush rotates to clean the wafer. The first post-CMP cleaning and the second post-CMP cleaning are performed simultaneously.

Abstract: Methods, systems, apparatus, and computer-readable media for distributed communication are provided. In one aspect, a system includes: a first Dynamic Communication Network Object (DCNO) configured on a first device and a second DCNO configured on a second device. The second DCNO is configured to, based on a notification message sent by a first worknode, allocate a target memory to store the target data in a memory of the second device, generate a read request based on the target data and the target memory, and transmit the read request to the first DCNO. The first DCNO is configured to: based on one or more properties of the target data, retrieve the target data from a memory of the first device, and write the target data to the target memory in the second device. A second worknode is configured to perform one or more data processing tasks based on the target data.

Abstract: A semiconductor structure includes: a first conductive layer arranged over a substrate; a dielectric layer arranged over the first conductive layer; a second conductive layer arranged within the dielectric layer and electrically connected to the first conductive layer, the second conductive layer including a sidewall distant from the dielectric layer by a width; and a first blocking layer over a surface of the first conductive layer between the second conducive layer and the dielectric layer. The first blocking layer includes at least one element of a precipitant.

Abstract: A semiconductor processing tool includes a cleaning chamber configured to perform a post-chemical mechanical polishing/planarization (post-CMP) cleaning operation in an oxygen-free (or in a near oxygen-free) manner. An inert gas may be provided into the cleaning chamber to remove oxygen from the cleaning chamber such that the post-CMP cleaning operation may be performed in an oxygen-free (or in a near oxygen-free) environment. In this way, the post-CMP cleaning operation may be performed in an environment that may reduce oxygen-causing corrosion of metallization layers and/or metallization structures on and/or in the semiconductor wafer, which may increase semiconductor processing yield, may decrease semiconductor processing defects, and/or may increase semiconductor processing quality, among other examples.

Abstract: A slurry composition, a semiconductor structure and a method for forming a semiconductor structure are provided. The slurry composition includes a slurry and a precipitant dispensed in the slurry. The semiconductor structure comprises a blocking layer including at least one element of the precipitant. The method includes using the slurry composition with the precipitant to polish a conductive layer and causing the precipitant to flow into the gap.

Abstract: A manufacturing method for a vapor chamber, a vapor chamber and a middle frame vapor chamber are disclosed. The manufacturing method for a vapor chamber includes preparing different raw materials for various parts of the vapor chamber, and machining and molding the various parts according to predetermined shapes of the various parts by using corresponding raw materials, assembling the machined and molded various parts of the vapor chamber, and welding and sealing the assembled various parts of the vapor chamber, performing a surface heat treatment on the vapor chamber, performing a passivating treatment on the vapor chamber, assembling the vapor chamber, injecting water into the vapor chamber assembled with the liquid injection pipe, vacuumizing the vapor chamber injected with water, performing a sealing treatment on the vacuumized vapor chamber, and welding the vapor chamber with a reinforcing rib.

Abstract: A method, a system, a device, and a storage medium for operation resource placement of deep learning are provided. The method includes: acquiring training operations to be placed and corresponding priorities; based on an order of the priorities, selecting a network structure for operation placement according to required resource amount of the training operations in sequence; the network structure including a server, a top of rack, a container group set denoted as Podset and a trunk layer switch; based on the selected network structure, taking a transmission amount of network data in a training process as an optimization target to perform minimization optimization, and obtaining a corresponding operation placement scheme.

Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes plurality of metal-insulator-metal capacitor units and a control circuit to dynamically select different amounts of the plurality of metal-insulator-metal capacitor units in correlation to a type of operation in a semiconductor die.

Abstract: A method for CMP includes following operations. A first metal layer and a second metal layer are formed in a dielectric structure. The second metal layer is formed over a portion of the first metal layer. A first composition is provided to remove a portion of the first metal layer. A second composition is provided to form a protecting layer over the second metal layer. The protecting layer is removed to expose the second metal layer. A CMP operation is performed to remove a portion of the first metal layer, a portion of the second metal layer and a portion of the dielectric structure.

Abstract: A semiconductor processing tool includes a cleaning chamber configured to perform a post-chemical mechanical polishing/planarization (post-CMP) cleaning operation in an oxygen-free (or in a near oxygen-free) manner. An inert gas may be provided into the cleaning chamber to remove oxygen from the cleaning chamber such that the post-CMP cleaning operation may be performed in an oxygen-free (or in a near oxygen-free) environment. In this way, the post-CMP cleaning operation may be performed in an environment that may reduce oxygen-causing corrosion of metallization layers and/or metallization structures on and/or in the semiconductor wafer, which may increase semiconductor processing yield, may decrease semiconductor processing defects, and/or may increase semiconductor processing quality, among other examples.