Patents by Inventor Guang-You Yu

Guang-You Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR PROCESSING METHOD
    Publication number: 20140342473
    Abstract: A method for detecting metal contamination from a film-forming process causing interface traps is described. The film-forming process is performed to form a dielectric film on a wafer. An annealing treatment is performed to reduce the interface traps between the wafer and the dielectric film. Thereafter, the bulk recombination lifetime (BRLT) of the wafer is measured to estimate the amount of the metal contamination.
    Type: Application
    Filed: May 14, 2013
    Publication date: November 20, 2014
    Applicant: United Microelectronics Corp.
    Inventors: Sheng Zhang, Guang-You Yu, Ying-Jie Xu, Chaw Che
  • Method of semiconductor process and semiconductor apparatus system
    Patent number: 7806684
    Abstract: A method of a semiconductor process is provided. The semiconductor process at least includes a first high temperature furnace process and a second high temperature furnace process. In the method, the first high temperature furnace process is performed on a first wafer boat carrying at least a wafer. Then, the second high temperature furnace process is performed on a second wafer boat carrying at least the same wafer. In addition, before the second high temperature furnace process is implemented, a moving step is performed, such that a relative position of the wafer in the first wafer boat is different from that of the wafer in the second wafer boat.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: October 5, 2010
    Assignee: United Microelectronics Corp.
    Inventor: Guang-You Yu
  • METHOD OF SEMICONDUCTOR PROCESS AND SEMICONDUCTOR APPARATUS SYSTEM
    Publication number: 20090087807
    Abstract: A method of a semiconductor process is provided. The semiconductor process at least includes a first high temperature furnace process and a second high temperature furnace process. In the method, the first high temperature furnace process is performed on a first wafer boat carrying at least a wafer. Then, the second high temperature furnace process is performed on a second wafer boat carrying at least the same wafer. In addition, before the second high temperature furnace process is implemented, a moving step is performed, such that a relative position of the wafer in the first wafer boat is different from that of the wafer in the second wafer boat.
    Type: Application
    Filed: October 2, 2007
    Publication date: April 2, 2009
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Guang-You Yu