Abstract: The present disclosure provides a silicon bar rinsing device comprising: a rinsing portion, wherein the rinsing portion is a cavity having a upper opening and is configured to rinse the silicon bar; an adjusting portion disposed in the rinsing portion; a compressed air pipeline disposed on a side of the rinsing portion and communicated with the rinsing portion; a reuse water pipeline disposed on an other side of the rinsing portion opposite to the compressed air pipeline and communicated with the rinsing portion; and a control unit disposed on a upper end of the rinsing portion and configured to control turning on or off of the silicon bar rinsing device.

Abstract: A method for adaptive concurrency for write persistence in a storage system, performed by the storage system, is provided. The method includes selecting a write process from among a plurality of write processes, responsive to receiving a write request for writing data into the storage system, and writing the data into the storage system in accordance with the selected write process. One of the plurality of write processes includes transferring the data into the storage system, locking an inode associated with file information of the data in memory, updating the file information in the inode while the inode is locked, committing the data while the inode is locked, and unlocking the inode.

Abstract: A method of operating a plurality of blades of a storage system, performed by the storage system, is provided. The method includes writing data stripes across one or more sets of blades of the plurality of blades within resiliency groups, the plurality of blades having computing resources and storage memory, each resiliency group supporting data recovery in case of loss of a specified number of blades of the resiliency group. The method includes transferring data from a first resiliency group to a second resiliency group, responsive to a change in geometry of the storage system.

Abstract: A method of communicating data over a Peripheral Component Interconnect Express (PCIe) Non-Transparent Bridge (NTB) comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message indicates an intent to transfer data to the remote processor, and receiving a second posted write message in response to the first posted write message, wherein the second posted write message indicates a destination address list for the data. Also disclosed is a method of communicating data over a PCIe NTB comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message comprises a request to read data, and receiving a data transfer message comprising at least some of the data requested by the first posted write message.

Abstract: A method comprising receiving a plurality of data records, storing the data records as data segments in a storage element, receiving a plurality of descriptors for each data segment, wherein each descriptor describes an aspect of data contained in the data segments, employing a first user-defined function to resolve a first minimum descriptor for each data segment and a first maximum descriptor for each data segment, composing a lightweight index for the data segments, wherein the lightweight index comprises the first minimum descriptor for each data segment and the first maximum descriptor for each data segment, and appending the lightweight index to the data segments in the storage element.

Abstract: A data processing apparatus and a data processing method are provided. The apparatus includes M protocol stacks and at least one distribution service module, and the M protocol stacks separately run on different logic cores of a processor and are configured to independently perform protocol processing on a data packet to be processed. The distribution service module receives an input data packet from a network interface and sends the data packet to one of the M protocol stacks for protocol processing, and receives data packets processed by the M protocol stacks and sends the data packets outwards through the network interface. The present disclosure implements a function of parallel protocol processing by multiple processes in user space of an operating system in a multi-core environment by using a parallel processing feature of a multi-core system, thereby reducing resource consumption caused by data packet copying.

Abstract: A peripheral component interconnect express PCI-e network system having a processor for (a) assigning addresses to the PCI-e topology tree, comprising: traversing, at a given level and in a breadth direction, down-link couplings to an interconnection; ascertaining, at the level, which of the down-link couplings are connected to nodes; assigning, at the level, addresses to nodes of ascertained down-link coupling having nodes; and (b) propagating, a level, comprising: traversing, at the level and in a depth direction, down-link couplings to the interconnection of the PCI-e network, ascertaining, at the level, which of the downlink couplings are coupled to other interconnections in the depth direction, consecutively proceeding in the depth direction, to a next level of the down-link coupling of a next interconnection; and alternatively repeating (a) and (b) until the nodes are assigned addresses within the PCI-e tree topology network.

Abstract: Systems and methods for offloading computations from a CPU directly to an accelerator engine are disclosed. One embodiment includes determining a function of an application to be offloaded from a CPU to an accelerator engine, locating data within a file necessary to perform the functions, programming a logic of the accelerator engine based on the function to be offloaded, programming a DMA engine to move a copy the data from a secondary storage device to the accelerator engine, and processing the data at the accelerator engine using the programmed logic.

Abstract: A method implemented by a database system, comprising generating, by a processor of the database system, a plurality of join requests to at least two database tables with a common field responsive to a plurality of data requests, identifying, by the processor, at least two intervals of data with the common field using the plurality of join requests, creating, by the processor, a shadow table comprising the at least two intervals of data with the common field, wherein the shadow table comprises a plurality of fields from the at least two database tables, and wherein the plurality of fields are identified based on at least one of the join requests, storing, in a memory coupled to the processor, the shadow table, and generating, by the processor, a response to a subsequent data request using data stored in the shadow table.

Abstract: A method of communicating data over a Peripheral Component Interconnect Express (PCIe) Non-Transparent Bridge (NTB) comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message indicates an intent to transfer data to the remote processor, and receiving a second posted write message in response to the first posted write message, wherein the second posted write message indicates a destination address list for the data. Also disclosed is a method of communicating data over a PCIe NTB comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message comprises a request to read data, and receiving a data transfer message comprising at least some of the data requested by the first posted write message.

Abstract: A method implemented by a network element (NE) in a network, comprising composing a first network storage entity by mapping a plurality of logical storage units to a plurality of physical storage units in a physical storage system according to a first storage metric associated with the plurality of physical storage units, arranging the plurality of logical storage units sequentially to form a logical circular buffer, and designating a current logical storage unit for writing data and an upcoming logical storage unit for writing data after the current storage unit is fully written, and rebalancing the physical storage system while the physical storage system is actively performing network storage operations by relocating at least one of the logical storage units to a different physical storage unit according to a second storage metric associated with the plurality of physical storage units.

Abstract: A method for adaptive concurrency for write persistence in a storage system, performed by the storage system, is provided. The method includes selecting a write process from among a plurality of write processes, responsive to receiving a write request for writing data into the storage system, and writing the data into the storage system in accordance with the selected write process. One of the plurality of write processes includes transferring the data into the storage system, locking an inode associated with file information of the data in memory, updating the file information in the inode while the inode is locked, committing the data while the inode is locked, and unlocking the inode.

Abstract: A method of communicating data over a Peripheral Component Interconnect Express (PCIe) Non-Transparent Bridge (NTB) comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message indicates an intent to transfer data to the remote processor, and receiving a second posted write message in response to the first posted write message, wherein the second posted write message indicates a destination address list for the data. Also disclosed is a method of communicating data over a PCIe NTB comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message comprises a request to read data, and receiving a data transfer message comprising at least some of the data requested by the first posted write message.

Abstract: An apparatus comprising at least one receiver configured to receive a traffic flow, receive information comprising a set of functions and an order of the set from a controller, and a processor coupled to the at least one receiver and configured to assign the traffic flow to one or more resources, determine a processing schedule for the traffic flow, and process the traffic flow by the set of functions, following the order of the set, using the one or more resources, and according to the processing schedule.

Abstract: A method for dynamically building a column store database from a row store database. The method includes establishing the row store database for storing data, wherein each row includes a plurality of attributes, and wherein data in row store database is current to a temporal point in time. The method includes establishing the column store database including data structured to satisfy received analytic queries. The method includes beginning from an initial state of the column store database, for each subsequently received analytic query, importing a targeted amount of data from a corresponding temporal state of the row store database into the column store database to satisfy the corresponding subsequently received analytic query.

Abstract: A system comprising a unified interconnect network, a plurality of process memory modules, and a plurality of processor modules configured to share access to the memory modules via the unified interconnect network. Data may be communicated between a plurality of processor modules and a plurality of shared resource pools via a unified interconnect network, wherein the communications comprise a protocol that is common to all resource pools, and wherein each resource pool comprises a plurality of resource modules each configured to perform a common function. Further, a network interface controller (NIC) module may be configured to receive data from a plurality of processor modules via a unified interconnect network, and provide core network connectivity to the processor modules.

Abstract: An approach to offloading probabilistic computations is described. An application server comprising a memory and a processor and coupled to a network-attached storage device configured to create a dedicated process in response to a procedural call to a virtual machine container based on a data request is disclosed. The processor forwards the data request to the network-attached storage device, programs one or more virtual machines to perform a probabilistic computation based on the procedural call, and directs the probabilistic computation to a first virtual machine of the one or more virtual machines. The request for data is transformed into a modified call using a virtualized lookup call.

Abstract: Embodiments of the present invention provide a data processing system and a data processing method. An MMIO address of a data request is obtained, where data stored in a PCIe storage device can be directly obtained from the MMIO address, and according to the MMIO address, a network adapter can directly read the data from the PCIe storage device of the data processing system, and transmit the data to a second data processing system, or directly write the data received from the second data processing system into the PCIe storage device. Therefore, the processing system can implement transmitting data directly from the PCIe storage device to the network adapter without using memory. During data transmission between the two data processing systems, a usage ratio of a resource, such as memory and a CPU, is reduced, and efficiency of data transmission is improved.

Abstract: Embodiments of the present invention provide a solution for managing inter-domain resource allocation in a Peripheral Component Interconnect-Express (PCIe) network. One processor among a plurality of link processors is elected as a management processor. The management processor obtains information about available resources of PCIe network. When a resource request from a request processor is received, the management processor allocates a resource of the available resources to the requesting processor. The management processor instructs one or more link processors to program one or more inter-domain NTBs through which the traffic between the allocated resource and the requesting processor is going to flow according to the memory address information of the allocated resource, to allow cross-domain resource access between the requesting processor and the allocated resource.

Abstract: In a high-dimensional PCI-Express (PCIe) network, implementation of alternative paths is accomplished to facilitate flexible topology implementation and network domain scaling while enabling improved communication latency. Different portions of the PCIe tree structure are connected to allow a shorter path for communications by utilizing a bridge circuit configured as an end-point with respect to two switches that are not directly connected in the PCIe tree topology. The bridge circuit performs address translations to allow communications from one switch to be passed via the bridge circuit to the other switch.