Abstract: A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of t

Abstract: Bonding pad(s) for a printed circuit board with circuit patterns are provided. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract: A method for forming bonding pads on a printed circuit board (PCB) with circuit patterns is provided. A plurality of copper patterns are formed on the PCB which are electrically connected to the circuit patterns, and a filler is filled between the copper patterns such that an upper surface of the copper pattern is exposed. A plating layer is then applied to the exposed upper surface of the copper patterns. Protrusion of the plating layer at a lower portion of a copper pattern is prevented, thus reducing an interval between the wire bonding pad(s) and potentially increasing the number of bonding pads which may be effectively formed on a given PCB.

Abstract: A printed circuit board (PCB) with a heat dissipation element, a method for manufacturing the PCB, and a semiconductor package using the PCB dissipates heat generated from the semiconductor chip and reduces a printed circuit board height. The PCB includes a heat sink panel, an alloy panel attached to one surface of the heat sink panel serving to ground and to dissipate heat, a circuit pattern layer having via holes formed on one surface of the alloy panel and electrically coupled to the alloy panel, and a cavity formed by perforating the circuit pattern layer and the alloy panel. A semiconductor chip is on the heat sink panel in the cavity and electrically coupled to the circuit pattern layer. The alloy panels with the circuit patterns can be manufactured in pairs with an insulation carrier therebetween. A plurality of dissipation protrusions can be formed on the surface of the alloy panel or the surface of the heat sink panel to couple the same.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.

Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

Abstract: Bonding pad(s) formed on a printed circuit board with circuit patterns. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract: A plating method for a printed circuit board includes: a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads; a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source; a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it; a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and a fifth step of making the power connection portion and the external power source to be electrically short. With this method, a printed circuit board without a power supply line for gold-plating can be obtained.

Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

Abstract: A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.

Abstract: The present invention to a method for forming an exposed portion of a circuit pattern in a printed circuit board, wherein a solder resist is coated on a substrate having a circuit pattern, is hardened, and thereafter is processed by a laser in order to form a portion exposing the circuit pattern such as the solder land. When the solder resist is processed by the laser, the number of errors can be greatly reduced as compared to a processing error occurred in exposure or developing process, whereby a circuit pattern that is integrated higher than the solder land is formed for thereby miniaturizing the printed circuit board.

Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

Abstract: Bonding pad(s) formed on a printed circuit board with circuit patterns. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract: A printed circuit board (PCB) with a heat dissipation element, a method for manufacturing the PCB, and a semiconductor package using the PCB dissipates heat generated from the semiconductor chip and reduces a printed circuit board height. The PCB includes a heat sink panel, an alloy panel attached to one surface of the heat sink panel serving to ground and to dissipate heat, a circuit pattern layer having via holes formed on one surface of the alloy panel and electrically coupled to the alloy panel, and a cavity formed by perforating the circuit pattern layer and the alloy panel. A semiconductor chip is on the heat sink panel in the cavity and electrically coupled to the circuit pattern layer. The alloy panels with the circuit patterns can be manufactured in pairs with an insulation carrier therebetween. A plurality of dissipation protrusions can be formed on the surface of the alloy panel or the surface of the heat sink panel to couple the same.

Abstract: A printed circuit board (PCB) and method of forming same is performed without incoming lines for plating. The plating is preferably performed on ball pad areas and/or bonding pad areas being the top layer of a multi-layer PCB. A metal layer that later forms circuit patterns serves to supply a power for plating ball pads for solder-ball bonding and bonding pads for wire-bonding with gold (Au). Thus, the gold (Au)-plating is performed prior to forming the circuit patterns. A positive-type first photoresist is coated on the metal layer to form the ball pads and the bonding pads. The coated first photoresist is also used to form circuit patterns. The gold (Au)-plated metal layer of ball pad areas and the bonding pad areas are protected by a second photoresist, which is reactive with a larger quantity of light than the first photoresist. Both first and second photoresists can be concurrently developed.

Abstract: A chip mounting structure provides an adhesive conductor between a chip and a printed circuit board. The adhesive conductor includes an adhesive layer having viscoelasticity to cushion thermal shock caused due to a difference in the thermal expansive coefficients between mutually connected layers; and conductive wires for electrically connecting the layers by vertically penetrating the adhesive layer. The adhesive conductor in accordance with the present invention includes a plurality of conductive wires penetrating the adhesive layer having viscoelasticity in a half-hardened state, so that the chip and the printed circuit board can be physically attached and at the same time be electrically connected. Also, the flip chip structure is protected from the thermal shock caused due to the difference between the thermal expansive coefficients of the chip and the printed circuit board, so that products fabricated by adopting it can have a high reliability.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A method for manufacturing a flexible printed circuit board having high productivity by making a flexible sheet rigid so that a process for manufacturing the flexible printed circuit board can be carried out on a rigid printed circuit board manufacturing system, includes: a laminating step of sequentially laminating a releasing member and sheets on one or both sides of an adhesive member, and adhering outer margins of the sheets to the adhesive member; an outer shaping step of cutting along both ends of the sheets, and a hole forming step of making holes for forming a circuit; a printed circuit board manufacturing step which is performed in the rigid printed circuit board manufacturing system; and a board separating step of separating the sheets from the adhesive member, and completing the flexible printed circuit board.