Patents by Inventor Guillermo L. Romero

Guillermo L. Romero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5508559
    Abstract: A method for forming a power circuit package (45) having a porous base structure (20) electrically isolated from a first porous die mount (21) and a second porous die mount (22) by a dielectric material (29). The porous base structure (20) is bonded to a second surface of the the dielectric material (29) whereas the first porous die mount (21), and the second porous die mount (22) are bonded to a first surface of the dielectric material (29). Simultaneous with the bonding step, the porous base structure (20), the first porous die mount (21), and the second porous die mount (22) are impregnated with a conductive material. Semiconductor die (32, 33, 34, and 35) are bonded to the impregnated die mounts. The semiconductor die (32, 33, 34, and 35) are then encapsulated by a molding compound.
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: April 16, 1996
    Assignee: Motorola, Inc.
    Inventors: Samuel J. Anderson, Guillermo L. Romero
  • Patent number: 5480727
    Abstract: A single, integral Metal Matrix Composite structure (47) includes a base plate (11), circuit layer (25), and lead supports (30,32), forming the single integral structure (47). Such a structure is particularly suited for power module applications. The various elements are well matched, thermally. Additionally, the structure (47) can be fabricated using straightforward molding processes, rather than complicated, fixtured, bonding and solder processes which are typically used for conventional power modules.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: January 2, 1996
    Assignee: Motorola, Inc.
    Inventors: Guillermo L. Romero, Brent W. Pinder
  • Patent number: 5465481
    Abstract: A semiconductor package (100) and module (300) includes a unitary base structure (101) and alignment mechanisms (104). The unitary base structure (101) includes a semiconductor mounting area (102) and encircling walls (103). The structure provides resistance to bowing as compared to a flat base. The lack of bowing provides improved thermal contact to a cold plate of the operating environment. The lack of bowing also reduces certain failure modes. The alignment mechanism (104) aligns module components during assembly, thereby simplifying assembly by eliminating the need for complicated fixtures which hold components in place.
    Type: Grant
    Filed: October 4, 1993
    Date of Patent: November 14, 1995
    Assignee: Motorola, Inc.
    Inventor: Guillermo L. Romero
  • Patent number: 5440787
    Abstract: A clasp for cloth neckwear and the like including a first clamping member designed to substantially encircle a first end of the neckwear and fixedly clamp the first end in a retained position, a second clamping member designed to substantially encircle a second end of the neckwear and fixedly clamp the second end in a retained position, and clasping means mounted on the first and second clamping members, the clasping means being manually engageable and disengageable for forming the neckwear into a continuous loop about the neck of a wearer. The neckwear is tied with a standard knot and severed in the back to provide the two ends and the clamping members are affixed to the ends after stretching the cloth slightly.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: August 15, 1995
    Inventors: Raul Figueroa, Guillermo L. Romero
  • Patent number: 5371043
    Abstract: A method for forming a power circuit package (45) having a porous base structure (20) electrically isolated from a first porous die mount (21) and a second porous die mount (22) by a dielectric material (29). The porous base structure (20) is bonded to a second surface of the the dielectric material (29) whereas the first porous die mount (21 ) , and the second porous die mount (22 ) are bonded to a first surface of the dielectric material (29). Simultaneous with the bonding step, the porous base structure (20) , the first porous die mount (21) , and the second porous die mount (22) are impregnated with a conductive material. Semiconductor die (32, 33, 34, and 35) are bonded to the impregnated die mounts. The semiconductor die (32, 33, 34, and 35) are then encapsulated by a molding compound.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: December 6, 1994
    Assignee: Motorola, Inc.
    Inventors: Samuel J. Anderson, Guillermo L. Romero