Abstract: A method of optimizing training of a machine learning model is disclosed. The method may include receiving an input training data using an optimization device. The input training data may include a plurality of training data samples. Further, a set of relevant training data samples from the input training data may be identified. The method may use the optimization device to select a suitable type and configuration of a machine learning model from a plurality of types and configurations of machine learning models for processing the set of relevant training data samples. Furthermore, the method may validate the set of relevant training data samples.

Abstract: The present invention relates to an ophthalmic pharmaceutical composition comprising a combination of fluoroquinolone antibacterial agent and an anti-inflammatory agent along with a complexing agent and water. The composition is having a pH between 4 and 8. The present invention also relates to the methods of making an ophthalmic pharmaceutical composition and there uses thereof. The present invention also provides a method of treating and/or preventing an ophthalmic condition in a patient.

Abstract: An electronic device according to various embodiments of the present invention can comprise: a housing; a first universal serial bus (USB) connector exposed through a portion of the housing, and including a first port; a plurality of second ports electrically connected with the first port; a third port for providing a plurality of logical wireless sessions; and a control circuit electrically connected with the plurality of second ports and the third port. The control circuit selects one of the second ports, and can provide a communication path between one of the logical wireless sessions and the selected second port in order to perform data communication. Additional various embodiments are possible.

Abstract: An electronic device according to various embodiments includes: a connector configured to be connected with an external electronic device; a memory configured to store instructions; and a processor configured to execute the stored instructions to control the electronic device to identify a control signal received through a channel initially activated based on the external electronic device being connected to the connector from among a plurality of channels, and to perform control based on a message included in the identified control signal.

Abstract: An electronic device is disclosed that includes a housing, a universal serial bus (USB) connector exposed through one region of the housing, a wireless communication circuitry supporting short-range wireless communication, at least one processor electrically connected with the USB connector and the wireless communication circuitry, and a memory electrically connected with the processor. The memory stores instructions, when executed, causing the at least one processor to, while the USB connector is connected with a first external device and while the wireless communication circuitry performs wireless communication with a second external device, determine a wired communication state with the first external device through the USB connector and adjust a power saving scheme for the wireless communication based at least in part on the determined state. In addition, various embodiments recognized through the specification are possible.

Abstract: An electronic device according to various embodiments of the present invention can comprise: a housing; a first universal serial bus (USB) connector exposed through a portion of the housing, and including a first port; a plurality of second ports electrically connected with the first port; a third port for providing a plurality of logical wireless sessions; and a control circuit electrically connected with the plurality of second ports and the third port. The control circuit selects one of the second ports, and can provide a communication path between one of the logical wireless sessions and the selected second port in order to perform data communication. Additional various embodiments are possible.

Abstract: A structured document analyzer that associates keys and values in structured documents based on key, value, and key-value container bounding boxes. A trained machine learning model analyzes images of structured documents to determine bounding boxes for keys, values, and key-value containers in the images with confidence scores for the classifications. For each image, duplicate bounding boxes are removed, and then a set of key-value containers are selected and sorted based on the confidence scores. For each key-value container, a best key and value are determined for the container based on overlap of the key and value bounding boxes with the container bounding box and the confidence scores. Optical character recognition may be performed on the image to determine text for the keys and values.

Abstract: An electronic device is disclosed that includes a housing, a universal serial bus (USB) connector exposed through one region of the housing, a wireless communication circuitry supporting short-range wireless communication, at least one processor electrically connected with the USB connector and the wireless communication circuitry, and a memory electrically connected with the processor. The memory stores instructions, when executed, causing the at least one processor to, while the USB connector is connected with a first external device and while the wireless communication circuitry performs wireless communication with a second external device, determine a wired communication state with the first external device through the USB connector and adjust a power saving scheme for the wireless communication based at least in part on the determined state. In addition, various embodiments recognized through the specification are possible.

Abstract: An electronic device according to various embodiments includes: a connector configured to be connected with an external electronic device; a memory configured to store instructions; and a processor configured to execute the stored instructions to control the electronic device to identify a control signal received through a channel initially activated based on the external electronic device being connected to the connector from among a plurality of channels, and to perform control based on a message included in the identified control signal.

Abstract: An electronic device according to various embodiments includes a housing; a user interface; a wireless communication circuit disposed in the housing; a wired communication interface exposed through the housing; a processor disposed in the housing and electrically connected to the user interface, the wireless communication circuit, and the wired communication interface; and a memory disposed in the housing and electrically connected to the processor, wherein the memory stores instructions that, when executed by the processor, cause the electronic device to establish a first communication channel with an external electronic device including a storage using the wireless communication circuit and/or the wired communication interface so that the electronic device operates as a device and the external electronic device operates as a host, to exchange information with the external electronic device through the first communication channel, and to establish a second communication channel with the external electronic d

Abstract: A method of operating an electronic device is provided. The method includes communicating data with a wireless network using a wireless communication, connecting to an external electronic device using a wired communication, exchanging data with the external device at a first data throughput using the wired communication while performing the wireless communication, and changing the first data throughput to a second data throughput while performing the wireless communication.

Abstract: An electronic device according to various embodiments includes a housing; a user interface; a wireless communication circuit disposed in the housing; a wired communication interface exposed through the housing; a processor disposed in the housing and electrically connected to the user interface, the wireless communication circuit, and the wired communication interface; and a memory disposed in the housing and electrically connected to the processor, wherein the memory stores instructions that, when executed by the processor, cause the electronic device to establish a first communication channel with an external electronic device including a storage using the wireless communication circuit and/or the wired communication interface so that the electronic device operates as a device and the external electronic device operates as a host, to exchange information with the external electronic device through the first communication channel, and to establish a second communication channel with the external electronic d

Abstract: A screen sharing method for an electronic device is provided. A first device communicates with a second device and shares a first screen. At the first device, a specific image is displayed superposed with the first screen, where the specific image is excluded from the first screen shared with the second electronic device. The second screen is thereafter shared with the second device. An intuitive user interface for editing a shared screen and thereafter sharing the edited screen is thus provided.

Abstract: Programmable delay circuits are described herein according to embodiments of the present disclosure. In one embodiment, a delay circuit comprises a plurality of delay stages coupled in series. Each of the delay stages comprises a delay gate on a forward path of the delay circuit, wherein the delay gate is configured to pass or block a signal on the forward path depending on a logic state of a respective select signal. Each of the delay stages also comprises a multiplexer on a return path of the delay circuit, wherein the multiplexer is configured to pass a signal on the return path or route the signal on the forward path to the return path depending on the logic state of the respective select signal. Output logic states of the delay gates and the multiplexers may remain static during a change in the delay setting of the delay circuit to reduce glitch.

Abstract: Programmable delay circuits are described herein according to embodiments of the present disclosure. In one embodiment, a delay circuit comprises a plurality of delay stages coupled in series. Each of the delay stages comprises a delay gate on a forward path of the delay circuit, wherein the delay gate is configured to pass or block a signal on the forward path depending on a logic state of a respective select signal. Each of the delay stages also comprises a multiplexer on a return path of the delay circuit, wherein the multiplexer is configured to pass a signal on the return path or route the signal on the forward path to the return path depending on the logic state of the respective select signal. Output logic states of the delay gates and the multiplexers may remain static during a change in the delay setting of the delay circuit to reduce glitch.

Abstract: Systems and methods for delay control are described herein. In one embodiment, a delay circuit comprises a first delay path and a second delay path. The delay circuit also comprises a plurality of switches, wherein each switch is coupled between different points on the first and second delay paths, and each switch is configured to turn on or off in response to a respective one of a plurality of select signals. The delay circuit further comprises a multiplexer having a first input coupled to an output of the first delay path, a second input coupled to an output of the second delay path, and an output coupled to an output of the delay circuit, wherein the multiplexer is configured to selectively couple one of the outputs of the first and second delay paths to the output of the delay circuit in response to a second select signal.

Abstract: Systems and methods for delay control are described herein. In one embodiment, a delay circuit comprises a first delay path and a second delay path. The delay circuit also comprises a plurality of switches, wherein each switch is coupled between different points on the first and second delay paths, and each switch is configured to turn on or off in response to a respective one of a plurality of select signals. The delay circuit further comprises a multiplexer having a first input coupled to an output of the first delay path, a second input coupled to an output of the second delay path, and an output coupled to an output of the delay circuit, wherein the multiplexer is configured to selectively couple one of the outputs of the first and second delay paths to the output of the delay circuit in response to a second select signal.

Abstract: A device comprising a clock circuit, a control circuit, and a current mode logic (CML) circuit is disclosed. The clock circuit provides a first differential clock signal and the control circuit generates a control signal based at least in part on the frequency of the first differential clock signal. The CML circuit generates a second differential clock signal based at least in part on the first differential clock signal. The CML circuit operates in one of a plurality of different frequency modes based at least in part on the control signal and includes a number of variable resistors that are responsive to the control signal.

Abstract: A screen sharing method for an electronic device is provided. A first device communicates with a second device and shares a first screen. At the first device, a specific image is displayed superposed with the first screen, where the specific image is excluded from the first screen shared with the second electronic device. The second screen is thereafter shared with the second device. An intuitive user interface for editing a shared screen and thereafter sharing the edited screen is thus provided.

Abstract: A device comprising a clock circuit, a control circuit, and a current mode logic (CML) circuit is disclosed. The clock circuit provides a first differential clock signal and the control circuit generates a control signal based at least in part on the frequency of the first differential clock signal. The CML circuit generates a second differential clock signal based at least in part on the first differential clock signal. The CML circuit operates in one of a plurality of different frequency modes based at least in part on the control signal and includes a number of variable resistors that are responsive to the control signal.