Abstract: A semiconductor structure includes a micro semiconductor device and a support fragment. The micro semiconductor device has a first surface and a second surface opposite the first surface. The micro semiconductor device includes a first electrode and a second electrode on the first surface. The first electrode and the second electrode are separated from each other. The support fragment is left on the micro semiconductor device and positioned corresponding to the region between the main portion of the first electrode and the second electrode in the vertical direction. The support fragment has an annular breaking surface in a plan view of the support fragment.

Abstract: A micro light-emitting diode package structure and a forming method thereof are provided. The micro light-emitting diode package structure includes micro light-emitting diode dies, a light-transmitting layer, a first insulating layer, redistribution layers, and conductive elements. The micro light-emitting diode dies are disposed side by side and each includes an electrode surface, a light-emitting surface, and side surfaces. The electrode surface and the light-emitting surface are opposite to each other, and the side surfaces are between them. The light-transmitting layer covers the light-emitting surface and the side surfaces. The first insulating layer is under the micro light-emitting diode dies and in direct contact with the electrode surface. The redistribution layers are disposed under the first insulating layer and pass through the first insulating layer to electrically connect the electrode surface.

Abstract: A micro light-emitting diode pixel structure and a method for forming the same are provided. The micro light emitting diode pixel structure includes micro light emitting diode chips, redistribution layers, bonding pads, an insulating layer, a flexible material layer and a first hard mask pattern. The redistribution layers are electrically connected to electrode surfaces of the micro light-emitting diode chips. The bonding pads are disposed under the redistribution layers. The insulation layer is disposed between the redistribution layers and the bonding pads. The flexible material layer disposed on the insulating layer to cover the micro light-emitting diode chips, the redistribution layers and insulation layer. The first hard mask pattern is disposed under or above the flexible material layers. In a cross-sectional view, the first hard mask pattern has a first edge and the flexible material layer has a second edge flush with the first edge.

Abstract: A light-emitting diode device including a pixel structure including first, second and third light-emitting diode chips, a passivation layer, and first, second, third and fourth circuit layers is provided. The first and second light-emitting diode chips are positioned on a top surface opposite to a light-emitting surface of the third light-emitting diode chip. First and second vertical projections of the first and second light-emitting diode chips on the top surface do not overlap each other. First and second bonding surfaces of the first and second circuit layers corresponding to openings in the passivation layer are positioned to overlap the first vertical projection and are separated from the second vertical projection. Third and fourth bonding surfaces of the third and fourth circuit layers that correspond to openings in the passivation layer are positioned to overlap the second vertical projection and are separated from the first vertical projection.

Abstract: A field management machine includes a rack, a driver, a transmission, traveling wheels, a cutter, and a gear shift lever. A first shift fork controls gear shift of the cutter. A second shift fork controls gear shift of the traveling wheels. The gear shift lever includes a traveling gear shift lever and a cutter gear shift lever. The cutter gear shift lever is connected to the first shift fork. The traveling gear shift lever is connected to the second shift fork. The field management machine includes a trigger rod between the cutter gear shift lever and the traveling gear shift lever. The trigger rod is connected to the cutter gear shift lever or the traveling gear shift lever. The traveling gear shift lever pushes the trigger rod when the traveling gear shift lever is switched to a reverse gear to shift the cutter gear shift to a neutral gear.

Abstract: A light-emitting device includes a substrate, a plurality of light-emitting diode (LED) dies, a first reflection layer, and a second reflection layer. The LED dies are on the substrate. The first reflection layer is on the LED dies. The second reflection layer is on the first reflection layer. The first reflection layer is configured to reflect a waveband of light emitted from the LED dies. The second reflection layer is configured to reflect a laser waveband, wherein the wavelength of the laser waveband is less than 420 nm.

Abstract: Embodiments provide a micro light-emitting diode package structure and a method for forming the same. The micro light-emitting diode package structure includes a redistribution layer, a control device, micro light-emitting diodes, and a flexible material layer. The control device and the micro light-emitting diodes are disposed on and electrically connected to the redistribution layer. The flexible material layer covers the control device and the micro light-emitting diodes, wherein the micro light-emitting diodes are in contact with the flexible material layer.

Abstract: A light-emitting diode chip includes a semiconductor layer, an insulating layer, a first and a second electrode. The semiconductor layer has a top side, a bottom side opposite to the top side and a sidewall connecting the top side and the bottom side, and a concave-convex structure is at the top side of the semiconductor layer. The insulating layer covers the sidewall and the bottom side of the semiconductor layer, and has a protruding portion extending and protruding above the concave-convex structure along a direction parallel to the sidewall. A vertical distance between a highest point of the concave-convex structure and that of the protruding portion is from 0.5 ?m to four times the thickness of the semiconductor layer. The first and the second electrode are on the bottom side of the semiconductor layer and penetrate through the insulating layer. The second electrode is adjacent to the first electrode.

Abstract: A light emitting diode includes an active layer, a first type semiconductor layer, a second type semiconductor layer and a pick-up layer. The first type semiconductor layer and the second type semiconductor layer are located on two opposite sides of the active layer respectively. The pick-up layer is located on the second type semiconductor layer, wherein the pick-up layer has a patterned outer surface to serve as a grabbed surface during transferring.

Abstract: A light emitting diode includes an active layer, a first type semiconductor layer, a second type semiconductor layer and a pick-up layer. The first type semiconductor layer and the second type semiconductor layer are located on two opposite sides of the active layer respectively. The pick-up layer is located on the second type semiconductor layer, wherein the pick-up layer has a patterned outer surface to serve as a grabbed surface during transferring.

Abstract: A flatness sensing device includes a pressure sensing unit and a controller. The pressure sensing unit includes a plate portion, and a pressure sensor fixed and exposed at an edge of the plate portion. A sensing surface of the pressure sensor is flush with the bottom surface of the plate portion. The pressure sensor senses a pressure or lack of pressure of an object to be tested when it touches the object to be tested. The controller receives the pressure value output from the pressure sensor and determines a flatness of the object to be tested, the controller can issue an alarm on finding non-flatness and cause the degree of flatness to be displayed to a user.

Abstract: A flatness sensing device includes a pressure sensing unit and a controller. The pressure sensing unit includes a plate portion, and a pressure sensor fixed and exposed at an edge of the plate portion. A sensing surface of the pressure sensor is flush with the bottom surface of the plate portion. The pressure sensor senses a pressure or lack of pressure of an object to be tested when it touches the object to be tested. The controller receives the pressure value output from the pressure sensor and determines a flatness of the object to be tested, the controller can issue an alarm on finding non-flatness and cause the degree of flatness to be displayed to a user.

Abstract: A micro light emitting diode includes a die-bonding substrate, an adhesive layer, an undoped III-V group semiconductor layer, an N-type III-V group semiconductor layer, a light emitting layer, and a P-type III-V group semiconductor layer. The adhesive layer is disposed on the die-bonding substrate. The undoped III-V group semiconductor layer is disposed on the adhesive layer, and the adhesive layer is between the die-bonding substrate and the undoped III-V group semiconductor layer. The N-type III-V group semiconductor layer is disposed on the undoped III-V group semiconductor layer. The light emitting layer is disposed on the N-type III-V group semiconductor layer. The P-type III-V group semiconductor layer is disposed on the N-type III-V group semiconductor layer, and the light emitting layer is between the N-type III-V group semiconductor layer and the P-type III-V group semiconductor layer.

Abstract: A micro light emitting diode includes a die-bonding substrate, an adhesive layer, an undoped III-V group semiconductor layer, an N-type III-V group semiconductor layer, a light emitting layer, and a P-type III-V group semiconductor layer. The adhesive layer is disposed on the die-bonding substrate. The undoped III-V group semiconductor layer is disposed on the adhesive layer, and the adhesive layer is between the die-bonding substrate and the undoped III-V group semiconductor layer. The N-type III-V group semiconductor layer is disposed on the undoped III-V group semiconductor layer. The light emitting layer is disposed on the N-type III-V group semiconductor layer. The P-type III-V group semiconductor layer is disposed on the N-type III-V group semiconductor layer, and the light emitting layer is between the N-type III-V group semiconductor layer and the P-type III-V group semiconductor layer.

Abstract: The disclosure provides a power supply device including an input connector, a direct current (DC) processing unit, and an alternating current (AC) processing unit. The input connector obtains an AC power from an AC power supply and transmits the AC power to the DC processing unit and AC processing unit. The DC processing unit converts the AC power to a DC power, and converts the DC power to a plurality of DC voltages. The AC processing unit converts the AC power provided by the power supply to a plurality of AC voltages. An electronic device including the power supply device is also provided.

Abstract: A motherboard assembly able to use a PCI slot either to expand system function or for the installation of additional memory includes a motherboard and a storage device. The motherboard includes a PCI expansion slot, a platform controller hub (PCH), and a power circuit. The PCI expansion slot includes a protrusion, four idle pins and first signal pins connected to the PCH, and first power pins connected to the power circuit. A control chip, a number of storage chips connected to the control chip, and a power unit are arranged on the storage device. A non-central notch is included in an edge connector arranged on a bottom edge of the storage device and the edge connector allows for power pins connected to the power unit and signal pins connected to the control chip.

Abstract: A connecting circuit includes a motherboard, a first back panel, and a second back panel. The motherboard defines a first connector and a second connector. The first connector includes a first address distinguishing pin. The second connector includes a second address distinguishing pin. The first back panel is coupled with the first connector and transmits a first address signal to the first connector. The second back panel is coupled with the second connector and transmits a second address signal to the second connector. The first address distinguishing pin is connected to ground and the second address distinguishing pin is connected to a high level voltage to distinguish the first address signal from the second address signal.

Abstract: A booting system includes a control module, a voltage regulation module, a complex programmable logic device (CPLD), and a power supply unit (PSU). The control module is configured to output a booting signal. The CPLD is coupled to the control module for receiving the booting signal and is configured to sense status of the voltage regulation module, a power control signal is outputted from the CPLD when the CPLD receives the booting signal and status of the voltage regulation module are normal. The PSU is coupled to the CPLD for receiving the power control signal from the CPLD and outputs a power signal for booting up a computer.

Abstract: A fan control circuit set in an electronic device, the fan control circuit includes a fan, a controller, a power supply, and a timer. The fan operates normally when the fan receives a control signal and a voltage. The controller outputs the control signal. The power supply supplies power. The timer is coupled between the fan, the controller, and the power supply. A first input of the timer is coupled to the controller to receive the control signal. When a second input of the timer receives a first signal from the power supply, the first input of the timer is coupled to an output of the timer. When the second input of the timer receives a second signal from the power supply, the second input of the timer is disconnected from the output of the timer after a preset time.

Abstract: A connecting circuit includes a motherboard, a first back panel, and a second back panel. The motherboard defines a first connector and a second connector. The first connector includes a first address distinguishing pin. The second connector includes a second address distinguishing pin. The first back panel is coupled with the first connector and transmits a first address signal to the first connector. The second back panel is coupled with the second connector and transmits a second address signal to the second connector. The first address distinguishing pin is connected to ground and the second address distinguishing pin is connected to a high level voltage to distinguish the first address signal from the second address signal.