Abstract: A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.

Abstract: A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substrate. In an embodiment, the layer includes at least one element from each of the first and second precursors. In an embodiment, the layer is TaN. In an embodiment, the precursors are TaF5 and NH3. In an embodiment, the plasma begins during the purge gas flow between the pulse of first precursor and the pulse of second precursor. In an embodiment, the enhancement is thermal energy. In an embodiment, the thermal energy is greater than generally accepted for ALD (>300 degrees Celsius). The enhancement assists the reaction of the precursors to deposit a layer on a substrate.

Abstract: A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first layer of TiN. The first layer of TiN is amorphous. The second layer of TiN is polycrystalline, having a mixed grain orientation. Finally, an aluminum film is formed on the second layer of titanium nitride. Optionally, a titanium silicide layer is formed on the semiconductor structure prior to the step of forming the first layer of titanium nitride. Interconnects formed according to the invention have polycrystalline aluminum films with grain sizes of approximately less than 0.25 microns.

Abstract: Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conductive debris across the tops of adjacent container structures. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract: A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the titanium layer is formed on the substrate by combining a second precursor with the seed layer by CVD. The titanium layer is used to form contacts to active areas of substrate and for the formation of interlevel vias.

Abstract: A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the titanium layer is formed on the substrate by combining a second precursor with the seed layer by CVD. The titanium layer is used to form contacts to active areas of substrate and for the formation of interlevel vias.

Abstract: The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting. The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.

Abstract: Systems, devices, structures, and methods are described that inhibit dielectric degradation in the presence of contaminants. An enhanced capacitor in a dynamic random access memory cell is discussed. The enhanced capacitor includes a first electrode, a dielectric coupled to the first electrode, a second electrode coupled to the dielectric, and at least one inhibiting layer that couples to the first electrode, the dielectric, and the second electrode. The inhibiting layer defines a chamber that encloses the capacitor and renders the capacitor impervious to disturbance in its physical or chemical forces in the presence of contaminants. The inhibiting layer includes a nitride compound, an oxynitride compound, and an oxide compound. In one embodiment, the nitride compound includes SixNy. In another embodiment, the oxynitride compound includes SiOxNy. In another embodiment, the oxide compound includes Al2O3 and (SrRu)O3. The variables x and y are indicative of a desired number of atoms.

Abstract: A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first layer of TiN. The first layer of TiN is amorphous. The second layer of TiN is polycrystalline, having a mixed grain orientation. Finally, an aluminum film is formed on the second layer of titanium nitride. Optionally, a titanium silicide layer is formed on the semiconductor structure prior to the step of forming the first layer of titanium nitride. Interconnects formed according to the invention have polycrystalline aluminum films with grain sizes of approximately less than 0.25 microns.

Abstract: A semiconductor device has a diffusion barrier formed between a doped glass layer and surface structures formed on a substrate. The diffusion barrier includes alumina and optionally a nitride, and has a layer thickness satisfying the high aspect ratio of the gaps between the surface structures, while adequately preventing dopants in doped glass layer from diffusing out of the doped glass layer to the surface structures and the substrate. Further, heavy water can be used during the formation of the alumina so that deuterium may be accomplished near the interface of surface structures and the substrate to enhance the performance of the device.

Abstract: Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conductive debris across the tops of adjacent container structures. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract: A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the titanium layer is formed on the substrate by combining a second precursor with the seed layer by CVD. The titanium layer is used to form contacts to active areas of substrate and for the formation of interlevel vias.

Abstract: A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the titanium layer is formed on the substrate by combining a second precursor with the seed layer by CVD. The titanium layer is used to form contacts to active areas of substrate and for the formation of interlevel vias.

Abstract: A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substrate. In an embodiment, the layer includes at least one element from each of the first and second precursors. In an embodiment, the layer is TaN. In an embodiment, the precursors are TaF5 and NH3. In an embodiment, the plasma begins during the purge gas flow between the pulse of first precursor and the pulse of second precursor. In an embodiment, the enhancement is thermal energy. In an embodiment, the thermal energy is greater than generally accepted for ALD (>300 degrees Celsius). The enhancement assists the reaction of the precursors to deposit a layer on a substrate.

Abstract: A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first layer of TiN. The first layer of TiN is amorphous. The second layer of TiN is polycrystalline, having a mixed grain orientation. Finally, an aluminum film is formed on the second layer of titanium nitride. Optionally, a titanium silicide layer is formed on the semiconductor structure prior to the step of forming the first layer of titanium nitride. Interconnects formed according to the invention have polycrystalline aluminum films with grain sizes of approximately less than 0.25 microns.

Abstract: A method for forming a metallization layer. A first layer is formed outwardly from a semiconductor substrate. Contact vias are formed through the first layer to the semiconductor substrate. A second layer is formed outwardly from the first layer. Portions of the second layer are selectively removed such that the remaining portion of the second layer defines the layout of the metallization layer and the contact vias. The first and second layers are electroplated by applying a bi-polar modulated voltage having a positive duty cycle and a negative duty cycle to the layers in a solution containing metal ions. The voltage and surface potentials are selected such that the metal ions are deposited on the remaining portions of the second layer. Further, metal ions deposited on the first layer during a positive duty cycle are removed from the first layer during a negative duty cycle. Finally, exposed portions of the first layer are selectively removed.

Abstract: A method of forming a coupling dielectric in a memory cell includes forming an oxide on a substrate, forming Ta2O5 on the oxide, oxidizing the Ta2O5 with rapid thermal process (RTP) at a temperature above the crystallization temperature for Ta2O5, forming a cell nitride on the oxidized Ta2O5, and forming a wetgate oxide on the cell nitride.

Abstract: The present invention comprises a method for preventing particle formation in a substrate overlying a DARC coating. The method comprises providing a semiconductor construct. A DARC coating is deposited on the construct with a plasma that comprises a silicon-based compound and N2O. The DARC coating is exposed to an atmosphere that effectively prevents a formation of defects in the substrate layer. The exposed DARC coating is overlayed with the substrate.

Abstract: Systems and methods are provided for detecting flow in a mass flow controller (MFC). The position of a gate in the MFC is sensed or otherwise determined to monitor flow through the MFC and to immediately or nearly immediately detect a flow failure. In one embodiment of the present invention, a novel MFC is provided. The MFC includes an orifice, a mass flow control gate, an actuator and a gate position sensor. The actuator moves the control gate to control flow through the orifice. The gate position sensor determines the gate position and/or gate movement to monitor flow and immediately or nearly immediately detect a flow failure. According to one embodiment of the present invention, the gate position sensor includes a transmitter for transmitting a signal and a receiver for receiving the signal such that the receiver provides an indication of the position of the gate based on the signal received.