Abstract: Video encoders may determine an initial designation of a mode in which to encode a block of pixels in an early stage of a block processing pipeline. A component of a late stage of the block processing pipeline (one that precedes the transcoder) may determine a different mode designation for the block of pixels based on coded block pattern information, motion vector information, the position of the block in a row of such blocks, the order in which such blocks are processed in the pipeline, or other encoding related syntax elements. The component in the late stage may communicate information to the transcoder usable in coding the block of pixels, such as modified syntax elements or an end of row marker. The transcoder may encode the block of pixels in accordance with the different mode designation or may change the mode again, dependent on the communicated information.

Abstract: Methods and apparatus for caching reference data in a block processing pipeline. A cache may be implemented to which reference data corresponding to motion vectors for blocks being processed in the pipeline may be prefetched from memory. Prefetches for the motion vectors may be initiated one or more stages prior to a processing stage. Cache tags for the cache may be defined by the motion vectors. When a motion vector is received, the tags can be checked to determine if there are cache block(s) corresponding to the vector (cache hits) in the cache. Upon a cache miss, a cache block in the cache is selected according to a replacement policy, the respective tag is updated, and a prefetch (e.g., via DMA) for the respective reference data is issued.

Abstract: Systems and methods for local tone mapping are provided. In one example, an electronic device includes an electronic display, an imaging device, and an image signal processor. The electronic display may display images of a first bit depth, and the imaging device may include an image sensor that obtains image data of a higher bit depth than the first bit depth. The image signal processor may process the image data, and may include local tone mapping logic that may apply a spatially varying local tone curve to a pixel of the image data to preserve local contrast when displayed on the display. The local tone mapping logic may smooth the local tone curve applied to the intensity difference between the pixel and another nearby pixel exceeds a threshold.

Abstract: Systems and methods for correcting intensity drop-offs due to geometric properties of lenses are provided. In one example, a method includes receiving an input pixel of the image data, the image data acquired using an image sensor. A color component of the input pixel is determined. A gain grid is determined by pointing to the gain grid in external memory. Each of the plurality of grid points is associated with a lens shading gain selected based upon the color of the input pixel. A nearest set of grid points that enclose the input pixel is identified. Further, a lens shading gain is determined by interpolating the lens shading gains associated with each of the set of grid points and is applied to the input pixel.

Abstract: System and method for improving operational efficiency of a video encoding pipeline, which includes a mode decision block that selects a luma intra-frame prediction mode used to encode a luma component of the source image data and a chroma reconstruction block that determines a first distortion expected to result in a first chroma transform block when each of a plurality of candidate chroma intra-frame prediction modes is implemented based on reconstructed image data, determines a second distortion expected to result in a second chroma transform block of the prediction unit when each of the plurality of candidate chroma intra-frame prediction modes is implemented based at least in part on the source image data, and selects a chroma intra-frame prediction mode used to encode a chroma component from the plurality of candidate chroma intra-frame prediction modes based at least in part on the first distortion and the second distortion.

Abstract: Systems, apparatuses, and methods for passing source pixel data through a display control unit. A display control unit includes N-bit pixel component processing lanes for processing source pixel data. When the display control unit receives M-bit source pixel components, wherein ‘M’ is greater than ‘N’, the display control unit may assign the M-bit source pixel components to the N-bit processing lanes. Then, the M-bit source pixel components may passthrough the pixel component processing elements of the display control unit without being modified.

Abstract: Devices and methods for reducing or eliminating sub-pixel layout artifacts on an electronic display are provided. One such device may include an electronic display to display image data, a processor to generate the image data, and sub-pixel layout compensation circuitry that modifies the image data to reduce or eliminate a sub-pixel layout artifact of the electronic display by modifying pixels of the image data on a sub-pixel-by-sub-pixel basis. The sub-pixel layout compensation circuitry may adjust a sub-pixel of a first color in a first pixel based at least in part on a first gradient between the sub-pixel of the first color of the first pixel and a sub-pixel of the first color of a second pixel.

Abstract: System and method for improving operational efficiency of a video encoding pipeline used to encode image data. The video encoding pipeline includes a mode decision block, which selects a first inter-frame prediction mode used to prediction encode a first prediction unit, and a motion estimation block, which receives the first inter-frame prediction mode as feedback from the mode decision block when processing a second prediction unit; determines an initial candidate inter-frame prediction mode of the second prediction unit based at least in part on the first inter-frame prediction mode; and determines a final candidate inter-frame prediction mode of the second prediction unit by performing a first motion estimation search based at least in part on the initial candidate inter-frame prediction mode.

Abstract: Devices and methods for reducing and/or substantially eliminating pixel charge imbalance due to variable refresh rates are provided. By way of example, a method includes providing a first frame of image data via a processor to a plurality of pixels of the display during a first frame period corresponding to a first refresh rate, and providing a second frame of image data to the plurality of pixels of the display during a second frame period corresponding to a second refresh rate. The method further includes dividing the first frame period into a first frame sub-period and a second frame sub-period, and driving the plurality of pixels of the display with the first frame of image data during the first frame sub-period and the second frame sub-period.

Abstract: System and method for improving operational efficiency of a video encoding pipeline used to encode image data. In embodiments, the video encoding pipeline includes a low resolution pipeline that includes a low resolution motion estimation block, which generates downscaled image data by reducing resolution of the image data and determines a low resolution inter-frame prediction mode by performing a motion estimation search using the downscaled image data and previously downscaled image data.

Abstract: System and method for improving operational efficiency of a video encoding pipeline used to encode image data.

Abstract: A method for adjusting the gain of a plurality of pixels across a display includes determining grid point gain adjustments for a plurality of grid points corresponding to coordinates across the display. The corresponding coordinates have a non-uniform spacing across the display. The method also includes determining uniformity gain adjustments for the plurality of pixels via interpolation with the grid point gain adjustments. The method also includes multiplying the uniformity gain adjustment for each pixel of the plurality of pixels by an input signal to the respective pixel. The drive strength supplied to the respective pixel is based at least in part on the input signal, and the drive strength supplied to each pixel is configured to control the light emitted from the respective pixel.

Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

Abstract: An electronic display includes a display side and an ambient light sensor configured to measure received light received through the display side. The electronic display also includes multiple pixels located between the display side and the ambient light sensor. The multiple pixels are configured to emit display light through the display side.

Abstract: Devices and methods for reducing or eliminating sub-pixel layout artifacts on an electronic display are provided. One such device may include an electronic display to display image data, a processor to generate the image data, and sub-pixel layout compensation circuitry that modifies the image data to reduce or eliminate a sub-pixel layout artifact of the electronic display by modifying pixels of the image data on a sub-pixel-by-sub-pixel basis. The sub-pixel layout compensation circuitry may adjust a sub-pixel of a first color in a first pixel based at least in part on a first gradient between the sub-pixel of the first color of the first pixel and a sub-pixel of the first color of a second pixel.

Abstract: A method of signaling additional chroma QP offset values that are specific to quantization groups is provided, in which each quantization group explicitly specifies its own set of chroma QP offset values. Alternatively, a table of possible sets of chroma QP offset values is specified in the header area of the picture, and each quantization group uses an index to select an entry from the table for determining its own set of chroma QP offset values. The quantization group specific chroma QP offset values are then used to determine the chroma QP values for blocks within the quantization group in addition to chroma QP offset values already specified for higher levels of the video coding hierarchy.

Abstract: Some embodiments provide a method of operating a device to capture an image of a high dynamic range (HDR) scene. Upon the device entering an HDR mode, the method captures and stores multiple images at a first image exposure level. Upon receiving a command to capture the HDR scene, the method captures a first image at a second image exposure level. The method selects a second image from the captured plurality of images. The method composites the first and second images to produce a composite image that captures the HDR scene. In some embodiments, the method captures multiple images at multiple different exposure levels.

Abstract: An image signal processing system may include processing circuitry that may reduce banding artifacts in image data to be depicted on a display. The processing circuitry may receive a first pixel value associated with a first pixel of the image data and detect a first set of pixels located in a first direction along a same row of pixels or a same column of pixels with respect to the first pixel. The first set of pixels is associated with a first band. The processing circuitry may then interpolate a second pixel value based on an average of a first set of pixel values that correspond to the first set of pixels and a distance between the first pixel and a closest pixel in the first band. The processing circuitry may then output the second pixel value for the first pixel.

Abstract: Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.

Abstract: Systems, apparatuses, and methods for generating a blur effect on a source image in a power-efficient manner. Pixels of the source image are averaged as they are read into pixel buffers, and then the source image is further downscaled by a first factor. Then, the downscaled source image is upscaled back to the original size, and then this processed image is composited with a semi-transparent image to create a blurred effect of the source image.