Abstract: An electronic display includes a display side and an ambient light sensor configured to measure received light received through the display side. The electronic display also includes multiple pixels located between the display side and the ambient light sensor. The multiple pixels are configured to emit display light through the display side.

Abstract: A method for adjusting the gain of a plurality of pixels across a display includes determining grid point gain adjustments for a plurality of grid points corresponding to coordinates across the display. The corresponding coordinates have a non-uniform spacing across the display. The method also includes determining uniformity gain adjustments for the plurality of pixels via interpolation with the grid point gain adjustments. The method also includes multiplying the uniformity gain adjustment for each pixel of the plurality of pixels by an input signal to the respective pixel. The drive strength supplied to the respective pixel is based at least in part on the input signal, and the drive strength supplied to each pixel is configured to control the light emitted from the respective pixel.

Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

Abstract: Devices and methods for reducing and/or substantially eliminating pixel charge imbalance due to variable refresh rates are provided. By way of example, a method includes providing a first frame of image data via a processor to a plurality of pixels of the display during a first frame period corresponding to a first refresh rate, and providing a second frame of image data to the plurality of pixels of the display during a second frame period corresponding to a second refresh rate. The method further includes dividing the first frame period into a first frame sub-period and a second frame sub-period, and driving the plurality of pixels of the display with the first frame of image data during the first frame sub-period and the second frame sub-period.

Abstract: A method of signaling additional chroma QP offset values that are specific to quantization groups is provided, in which each quantization group explicitly specifies its own set of chroma QP offset values. Alternatively, a table of possible sets of chroma QP offset values is specified in the header area of the picture, and each quantization group uses an index to select an entry from the table for determining its own set of chroma QP offset values. The quantization group specific chroma QP offset values are then used to determine the chroma QP values for blocks within the quantization group in addition to chroma QP offset values already specified for higher levels of the video coding hierarchy.

Abstract: Some embodiments provide a method of operating a device to capture an image of a high dynamic range (HDR) scene. Upon the device entering an HDR mode, the method captures and stores multiple images at a first image exposure level. Upon receiving a command to capture the HDR scene, the method captures a first image at a second image exposure level. The method selects a second image from the captured plurality of images. The method composites the first and second images to produce a composite image that captures the HDR scene. In some embodiments, the method captures multiple images at multiple different exposure levels.

Abstract: Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.

Abstract: An image signal processing system may include processing circuitry that may reduce banding artifacts in image data to be depicted on a display. The processing circuitry may receive a first pixel value associated with a first pixel of the image data and detect a first set of pixels located in a first direction along a same row of pixels or a same column of pixels with respect to the first pixel. The first set of pixels is associated with a first band. The processing circuitry may then interpolate a second pixel value based on an average of a first set of pixel values that correspond to the first set of pixels and a distance between the first pixel and a closest pixel in the first band. The processing circuitry may then output the second pixel value for the first pixel.

Abstract: Systems, apparatuses, and methods for generating a blur effect on a source image in a power-efficient manner. Pixels of the source image are averaged as they are read into pixel buffers, and then the source image is further downscaled by a first factor. Then, the downscaled source image is upscaled back to the original size, and then this processed image is composited with a semi-transparent image to create a blurred effect of the source image.

Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

Abstract: A method of signaling additional chroma QP offset values that are specific to quantization groups is provided, in which each quantization group explicitly specifies its own set of chroma QP offset values. Alternatively, a table of possible sets of chroma QP offset values is specified in the header area of the picture, and each quantization group uses an index to select an entry from the table for determining its own set of chroma QP offset values. The quantization group specific chroma QP offset values are then used to determine the chroma QP values for blocks within the quantization group in addition to chroma QP offset values already specified for higher levels of the video coding hierarchy.

Abstract: A method for attenuating banding in image data may involve receiving a stream of input pixels. The method may then include applying a bi-lateral filter to a first portion of the stream of input pixels to generate a first filtered output and applying a high pass filter to a second portion of the stream of input pixels to generate a second filtered output. The method may then determine a local activity and a local intensity associated with the first portion of the stream. The method may then include blending the first filtered output with the first portion of the stream of input pixels based at least in part on the local activity and the local intensity to generate a third filtered output. Afterward, the method may combine the third filtered output with the second filtered output to generate a fourth filtered output that may be output as the image data.

Abstract: An image signal processing system may include processing circuitry that may reduce banding artifacts in image data to be depicted on a display. The processing circuitry may receive a first pixel value associated with a first pixel of the image data and detect a first set of pixels located in a first direction along a same row of pixels or a same column of pixels with respect to the first pixel. The first set of pixels is associated with a first band. The processing circuitry may then interpolate a second pixel value based on an average of a first set of pixel values that correspond to the first set of pixels and a distance between the first pixel and a closest pixel in the first band. The processing circuitry may then output the second pixel value for the first pixel.

Abstract: A method for attenuating banding in image data may involve receiving a stream of input pixels. The method may then include applying a bi-lateral filter to a first portion of the stream of input pixels to generate a first filtered output and applying a high pass filter to a second portion of the stream of input pixels to generate a second filtered output. The method may then determine a local activity and a local intensity associated with the first portion of the stream. The method may then include blending the first filtered output with the first portion of the stream of input pixels based at least in part on the local activity and the local intensity to generate a third filtered output. Afterward, the method may combine the third filtered output with the second filtered output to generate a fourth filtered output that may be output as the image data.

Abstract: Systems, apparatuses, and methods for performing linear scaling in a display control unit. A display control unit receives source image data that has already been gamma encoded with an unknown gamma value. The display control unit includes a hard-coded LUT storing a gamma curve of a first gamma value which is used to perform a degamma operation on the received source image data. Even if the first gamma value used to perform the degamma operation is different from the gamma value used to gamma encode the source image data, fewer visual artifacts are generated as compared with not performing a degamma operation. After the degamma operation is performed, the source image data may be linearly scaled.

Abstract: The video encoders described herein may make an initial determination to designate a macroblock as a skip macroblock, but may subsequently reverse that decision based on additional information. For example, an initial skip mode decision may be based on aggregate distortion metrics for the luma component of the macroblock (e.g., SAD, SATD, or SSD), then reversed based on an individual pixel difference metric, an aggregate or individual pixel metric for a chroma component of the macroblock, or on the position of the macroblock within a macroblock row. The final skip mode decision may be based, at least in part, on the maximum difference between any pixel in the macroblock (or in a region of interest within the macroblock) and the corresponding pixel in a reference frame. The initial skip mode decision may be made during an early stage of a pipelined video encoding process and reversed in a later stage.

Abstract: In an embodiment, a system includes a display processing unit configured to process a video sequence for a target display. In some embodiments, the display processing unit is configured to composite the frames from frames of the video sequence and one or more other image sources. The display processing unit may be configured to write the processed/composited frames to memory, and may also be configured to generate statistics over the frame data, where the generated statistics are usable to encode the frame in a video encoder. The display processing unit may be configured to write the generated statistics to memory, and the video encoder may be configured to read the statistics and the frames. The video encoder may be configured to encode the frame responsive to the statistics.

Abstract: Systems, apparatuses, and methods for generating a blur effect on a source image in a power-efficient manner. Pixels of the source image are averaged as they are read into pixel buffers, and then the source image is further downscaled by a first factor. Then, the downscaled source image is upscaled back to the original size, and then this processed image is composited with a semi-transparent image to create a blurred effect of the source image.

Abstract: Systems, apparatuses, and methods for passing source pixel data through a display control unit. A display control unit includes N-bit pixel component processing lanes for processing source pixel data. When the display control unit receives M-bit source pixel components, wherein ‘M’ is greater than ‘N’, the display control unit may assign the M-bit source pixel components to the N-bit processing lanes. Then, the M-bit source pixel components may passthrough the pixel component processing elements of the display control unit without being modified.

Abstract: Methods and apparatus for configuring multiple components of a subsystem are described. The configuration memory of each of a plurality of components coupled to an interconnect includes a global configuration portion. The configuration memory of one of the components may be designated as a master global configuration for all of the components. A module coupled to the interconnect may receive writes to the components from a configuration source. For each write, the module may decode the write to determine addressing information and check to see if the write is addressed to the master global configuration. If the write is addressed to the master global configuration, the module broadcasts the write to the global configuration portion of each of the components via the interconnect. If the write is not addressed to the master global configuration, the module forwards the write to the appropriate component via the interconnect.