Patents by Inventor Guy F. Hudson

Guy F. Hudson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030207577
    Abstract: Methods of oxidizing the surface of a photoresist material on a semiconductor substrate to alter the photoresist material surface to be substantially hydrophillic. Oxidation of the photoresist material surface substantially reduces or eliminates stiction between a planarizing pad and the photoresist material surface during chemical mechanical planarization. This oxidation of the photoresist material may be achieved by oxygen plasma etching or ashing, by immersing the semiconductor substrate in a bath containing an oxidizing agent, or by the addition of an oxidizing agent to the chemical slurry used during planarization of the resist material.
    Type: Application
    Filed: June 4, 2003
    Publication date: November 6, 2003
    Inventors: Guy F. Hudson, Michael A. Walker
  • Patent number: 6640816
    Abstract: The inventive method cleans residual titanium accumulations and other undesirable materials from a planarized surface of a wafer to produce a planarized surface with less than about fifty defects per wafer. After a metallic layer of material has been planarized using a CMP process, loose residual particles of undesirable material are removed from the planarized surface. The residual titanium accumulations remaining on the planarized surface are then detached from the planarized surface, which produces additional, new particles on the surface of the wafer. The additional particles produced by the detaching step are then scrubbed from the planarized surface until the planarized surface has less than approximately 50 defects per wafer.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: November 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: David Gonzales, Guy F. Hudson
  • Patent number: 6635574
    Abstract: Methods of oxidizing the surface of a photoresist material on a semiconductor substrate to alter the photoresist material surface to be substantially hydrophillic. Oxidation of the photoresist material surface substantially reduces or eliminates stiction between a planarizing pad and the photoresist material surface during chemical mechanical planarization. This oxidation of the photoresist material may be achieved by oxygen plasma etching or ashing, by immersing the semiconductor substrate in a bath containing an oxidizing agent, or by the addition an oxidizing agent to the chemical slurry used during planarization of the resist material.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: October 21, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Guy F. Hudson, Michael A. Walker
  • Patent number: 6610610
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: August 26, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Patent number: 6593657
    Abstract: A method of making a contact plug and a metallization line structure is disclosed in which a substrate is provided with at least one contact hole within an insulation layer situated on a semiconductor substrate of a semiconductor wafer. A first metal layer is deposited upon the semiconductor wafer within the contact hole. A planarizing step isolates the first metal layer within the insulation layer in the form of a contact plug within the contact hole. A second metal layer is then deposited upon the semiconductor wafer over and upon the contact plug. Metallization lines are patterned and etched from the second metal layer. The contact hole may also be lined with a refractory metal nitride layer, with a refractory metal silicide interface being formed at the bottom of the contact hole as an interface between the contact plug and a silicon layer on the semiconductor substrate.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: July 15, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Richard L. Elliott, Guy F. Hudson
  • Publication number: 20030121538
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Application
    Filed: February 14, 2003
    Publication date: July 3, 2003
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Patent number: 6530113
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: March 11, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Publication number: 20020146907
    Abstract: A method and apparatus for making and using slurries for planarizing microelectronic-device substrate assemblies in mechanical and/or chemical-mechanical planarization processes. In one aspect of the invention, a bi-modal slurry is fabricated by removing a first type of selected abrasive particles from a first abrasive particle solution to form a treated flow of the first solution. The treated flow of the first solution is then combined with a flow of a second solution having a plurality of second abrasive particles. The abrasive particles of the first type are accordingly removed from the first solution separately from the second solution such that the second abrasive particles in the second solution do not affect the removal of the abrasive particles of the first type from the first solution. In another aspect of the invention, a second type of selected abrasive particles are removed from the second solution prior to mixing with the first solution.
    Type: Application
    Filed: May 23, 2002
    Publication date: October 10, 2002
    Inventor: Guy F. Hudson
  • Publication number: 20020144720
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Application
    Filed: May 24, 2002
    Publication date: October 10, 2002
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon, Renee Zahorik
  • Patent number: 6447634
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. The process comprising the steps of aligning said area of said wafer, such as an alignment mark on the wafer, to an etchant dispensing apparatus, placing the surface of the wafer adjacent at least a portion of an annular portion of the etchant dispensing apparatus, dispensing at least one etchant onto said area of said wafer, such as an alignment mark, and removing the at least one etching from the wafer.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: September 10, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh F. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Patent number: 6440319
    Abstract: A measurement of polyurethane pad characteristics is used to predict performance characteristics of polyurethane pads used for chemical mechanical planarization (CMP) of semiconductor wafers, and to adjust process parameters for manufacturing polyurethane pads. In-situ fluorescence measurements of a pad that has been exposed to a high pH and high temperature environment are performed. The fluorescence characteristics of the pad are used to predict the rate of planarization of a wafer. A portion of one pad from a manufacturing lot is soaked in an organic solvent which causes the portion to swell. The relative increase in size is indicative of the performance characteristics of pads within the manufacturing lot Statistical Process Control methods are used to optimize the CMP pad manufacturing process. Predicted pad characteristics are available for each pad.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: August 27, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Scott G. Meikle, Guy F. Hudson
  • Patent number: 6407000
    Abstract: A method and apparatus for making and using slurries for planarizing microelectronic-device substrate assemblies in mechanical and/or chemical-mechanical planarization processes. In one aspect of the invention, a bi-modal slurry is fabricated by removing a first type of selected abrasive particles from a first abrasive particle solution to form a treated flow of the first solution. The treated flow of the first solution is then combined with a flow of a second solution having a plurality of second abrasive particles. The abrasive particles of the first type are accordingly removed from the first solution separately from the second solution such that the second abrasive particles in the second solution do not affect the removal of the abrasive particles of the first type from the first solution. In another aspect of the invention, a second type of selected abrasive particles are removed from the second solution prior to mixing with the first solution.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: June 18, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Guy F. Hudson
  • Patent number: 6368194
    Abstract: A method and apparatus for processing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a planarizing liquid and rinsing the substrate with a rinsing liquid having a pH approximately the same as a pH of the planarizing liquid. The rinsing step can be completed while the substrate remains on a polishing pad of the apparatus, or, alternatively, the substrate can be removed to a rinsing chamber for rinsing. In another embodiment, the method can include conditioning the polishing pad by removing polishing pad material from the polishing pad and then cleaning the microelectronic substrate by engaging the substrate with the same polishing pad and moving at least one of the polishing pad and the substrate relative to the other of the polishing pad and the substrate after conditioning the polishing pad.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: April 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Judson R. Sharples, Kenneth F. Zacharias, Guy F. Hudson
  • Publication number: 20020025687
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Application
    Filed: August 30, 2001
    Publication date: February 28, 2002
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Publication number: 20020019197
    Abstract: A method and apparatus for processing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a planarizing liquid and rinsing the substrate with a rinsing liquid having a pH approximately the same as a pH of the planarizing liquid. The rinsing step can be completed while the substrate remains on a polishing pad of the apparatus, or, alternatively, the substrate can be removed to a rinsing chamber for rinsing. In another embodiment, the method can include conditioning the polishing pad by removing polishing pad material from the polishing pad and then cleaning the microelectronic substrate by engaging the substrate with the same polishing pad and moving at least one of the polishing pad and the substrate relative to the other of the polishing pad and the substrate after conditioning the polishing pad.
    Type: Application
    Filed: April 24, 2001
    Publication date: February 14, 2002
    Inventors: Judson R. Sharples, Kenneth F. Zacharias, Guy F. Hudson
  • Publication number: 20020011255
    Abstract: The inventive method cleans residual titanium accumulations and other undesirable materials from a planarized surface of a wafer to produce a planarized surface with less than about fifty defects per wafer. After a metallic layer of material has been planarized using a CMP process, loose residual particles of undesirable material are removed from the planarized surface. The residual titanium accumulations remaining on the planarized surface are then detached from the planarized surface, which produces additional, new particles on the surface of the wafer. The additional particles produced by the detaching step are then scrubbed from the planarized surface until the planarized surface has less than approximately 50 defects per wafer.
    Type: Application
    Filed: June 22, 2001
    Publication date: January 31, 2002
    Inventors: David Gonzales, Guy F. Hudson
  • Patent number: 6329301
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. The process comprising the steps of aligning said area of said wafer, such as an alignment mark on the wafer, to an etchant dispensing apparatus, placing the surface of the wafer adjacent at least a portion of an annular portion of the etchant dispensing apparatus, dispensing at least one etchant onto said area of said wafer, such as an alignment mark, and removing the at least one etching from the wafer.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: December 11, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Patent number: 6273101
    Abstract: The inventive method cleans residual titanium accumulations and other undesirable materials from a planarized surface of a wafer to produce a planarized surface with less than about fifty defects per wafer. After a metallic layer of material has been planarized using a CMP process, loose residual particles of undesirable material are removed from the planarized surface. The residual titanium accumulations remaining on the planarized surface are then detached from the planarized surface, which produces additional, new particles on the surface of the wafer. The additional particles produced by the detaching step are then scrubbed from the planarized surface until the planarized surface has less than approximately 50 defects per wafer.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: August 14, 2001
    Assignee: Micron Technology, Inc.
    Inventors: David Gonzales, Guy F. Hudson
  • Publication number: 20010007796
    Abstract: Methods of oxidizing the surface of a photoresist material on a semiconductor substrate to alter the photoresist material surface to be substantially hydrophillic. Oxidation of the photoresist material surface substantially reduces or eliminates stiction between a planarizing pad and the photoresist material surface during chemical mechanical planarization. This oxidation of the photoresist material may be achieved by oxygen plasma etching or ashing, by immersing the semiconductor substrate in a bath containing an oxidizing agent, or by the addition an oxidizing agent to the chemical slurry used during planarization of the resist material.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 12, 2001
    Inventors: Guy F. Hudson, Michael A. Walker
  • Patent number: 6220934
    Abstract: A method and apparatus for processing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a planarizing liquid and rinsing the substrate with a rinsing liquid having a pH approximately the same as a pH of the planarizing liquid. The rinsing step can be completed while the substrate remains on a polishing pad of the apparatus, or, alternatively, the substrate can be removed to a rinsing chamber for rinsing. In another embodiment, the method can include conditioning the polishing pad by removing polishing pad material from the polishing pad and then cleaning the microelectronic substrate by engaging the substrate with the same polishing pad and moving at least one of the polishing pad and the substrate relative to the other of the polishing pad and the substrate after conditioning the polishing pad.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Judson R. Sharples, Kenneth F. Zacharias, Guy F. Hudson